HD64F3664H Renesas Electronics America, HD64F3664H Datasheet - Page 124
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HD64F3664H
Manufacturer Part Number
HD64F3664H
Description
IC H8 MCU FLASH 32K 64QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet
1.US3664-BAG1.pdf
(446 pages)
Specifications of HD64F3664H
Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, SCI
Peripherals
PWM, WDT
Number Of I /o
29
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Section 6 Power-Down Modes
6.4.2
The time from the start of SLEEP instruction execution to the end of interrupt exception handling
(the direct transition time) is calculated by equation (2).
Direct transition time = {(number of SLEEP instruction execution states) +
(number of internal processing states)} × (tsubcyc before transition) +
{(waiting time set in bits STS2 to STS0) + (number of interrupt exception handling states)} ×
(tcyc after transition)…………………………………………………………………………(2)
6.5
The module-standby function can be set to any peripheral module. In module standby mode, the
clock supply to modules stops to enter the power-down mode. Module standby mode enables each
on-chip peripheral module to enter the standby state by setting a bit that corresponds to each
module to 1 and cancels the mode by clearing the bit to 0.
6.6
When subsleep mode is entered by setting the SMSEL bit to 1 while the subclock is not used (the
X
down mode while a port is retained, connect the subclock to the X
Rev. 6.00 Mar. 24, 2006 Page 94 of 412
REJ09B0142-0600
1
pin is fixed), note that active mode cannot be re-entered by using an interrupt. To use a power-
Example
Direct transition time = (2 + 1) × 8 tw + (8192 + 14) × tosc = 24tw + 8206 tosc
(when the CPU operating clock of φ
[Legend]
tosc: OSC clock cycle time
tw: watch clock cycle time
tcyc: system clock (φ) cycle time
tsubcyc: subclock (φ
Direct Transition from Subactive Mode to Active Mode
Module Standby Function
Usage Note
SUB
) cycle time
w
/8 → φ
osc
and a waiting time of 8192 states are selected)
1
and X
2
pins.
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