C8051F022 Silicon Laboratories Inc, C8051F022 Datasheet - Page 139
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C8051F022
Manufacturer Part Number
C8051F022
Description
IC 8051 MCU 64K FLASH 100TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F02xr
Specifications of C8051F022
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
64
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x8b, 8x10b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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15.
The C8051F020/1/2/3 family includes 64k + 128 bytes of on-chip, reprogrammable FLASH memory for program
code and non-volatile data storage. The FLASH memory can be programmed in-system, a single byte at a time,
through the JTAG interface or by software. Once cleared to logic 0, a FLASH bit must be erased to set it back to
logic 1. The bytes would typically be erased (set to 0xFF) before being reprogrammed. FLASH write and erase oper-
ations are automatically timed by hardware for proper execution; data polling to determine the end of the write/erase
operation is not required. Refer to Table 15.1 for the electrical characteristics of the FLASH memory.
15.1. Programming The FLASH Memory
The simplest means of programming the FLASH memory is through the JTAG interface using programming tools
provided by Silicon Labs or a third party vendor. This is the only means for programming a non-initialized device.
For details on the JTAG commands to program FLASH memory, see
mands” on page
The FLASH memory can be programmed by software using a MOVX write instruction, with the address and data
byte to be programmed provided as normal operands. Before writing to FLASH memory using a MOVX write,
FLASH write operations must be enabled by setting the PSWE Program Store Write Enable bit (PSCTL.0) to logic 1.
This directs the MOVX writes to FLASH memory instead of XRAM. The PSWE bit remains set until cleared by soft-
ware. To avoid errant FLASH writes, it is recommended that interrupts be disabled while the PSWE bit is logic 1.
FLASH memory is read using the MOVC read instruction. MOVX reads are always directed to XRAM, regardless of
the state of PSWE.
To ensure the integrity of FLASH contents, it is strongly recommended that the on-chip VDD monitor be
enabled by tying the MONEN pin to VDD in any system which includes code that writes to or erases FLASH
memory from software.
A write to FLASH memory can clear bits but cannot set them; only an erase operation can set bits in FLASH. A byte
location to be programmed must be erased before a new value can be written. The 64k byte FLASH memory is
organized in 512-byte pages. The erase operation applies to an entire page (setting all bytes in the page to 0xFF). The
following steps illustrate the algorithm for programming FLASH by user software.
FLASH MEMORY
Step 1. Disable interrupts.
Step 2. Set FLWE (FLSCL.0) to enable FLASH writes/erases via user software.
Step 3. Set PSEE (PSCTL.1) to enable FLASH erases.
Step 4. Set PSWE (PSCTL.0) to redirect MOVX commands to write to FLASH.
Step 5. Use the MOVX command to write a data byte to any location within the 512-byte page to be erased.
Step 6. Clear PSEE to disable FLASH erases
Step 7. Use the MOVX command to write a data byte to the desired byte location within the erased 512-byte
Step 8. Clear the PSWE bit to redirect MOVX commands to the XRAM data space.
Step 9. Re-enable interrupts.
page. Repeat this step until all desired bytes are written (within the target page).
268.
Rev. 1.4
Section “24.2. Flash Programming Com-
C8051F020/1/2/3
139