MC68HC908JB12JDW Freescale Semiconductor, MC68HC908JB12JDW Datasheet - Page 22

IC MCU 12K FLASH 6MHZ USB 20SOIC

MC68HC908JB12JDW

Manufacturer Part Number
MC68HC908JB12JDW
Description
IC MCU 12K FLASH 6MHZ USB 20SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC68HC908JB12JDW

Core Processor
HC08
Core Size
8-Bit
Speed
6MHz
Connectivity
SCI, USB
Peripherals
LED, LVD, POR, PWM
Number Of I /o
13
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908JB12JDW
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
MC68HC908JB12JDWE
Manufacturer:
XILINX
Quantity:
152
List of Figures
Technical Data
22
Figure
8-5
8-6
8-7
8-8
8-9
8-10 Interrupt Recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
8-11 Interrupt Recognition Example . . . . . . . . . . . . . . . . . . . . . . . . 111
8-12 Interrupt Status Register 1 (INT1). . . . . . . . . . . . . . . . . . . . . . 112
8-13 Interrupt Status Register 2 (INT2). . . . . . . . . . . . . . . . . . . . . . 114
8-14 Wait Mode Entry Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
8-15 Wait Recovery from Interrupt or Break . . . . . . . . . . . . . . . . . . 116
8-16 Wait Recovery from Internal Reset. . . . . . . . . . . . . . . . . . . . . 116
8-17 Stop Mode Entry Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
8-18 Stop Mode Recovery from Interrupt or Break . . . . . . . . . . . . . 117
8-19 SIM Break Status Register (SBSR) . . . . . . . . . . . . . . . . . . . . 118
8-20 SIM Reset Status Register (SRSR) . . . . . . . . . . . . . . . . . . . . 119
8-21 SIM Break Flag Control Register (SBFCR) . . . . . . . . . . . . . . 120
9-1
9-2
9-3
9-4
9-5
9-6
9-7
9-8
10-1 TIM Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
10-2 TIM I/O Register Summary . . . . . . . . . . . . . . . . . . . . . . . . . . .141
10-3 PWM Period and Pulse Width . . . . . . . . . . . . . . . . . . . . . . . . 146
10-4 TIM Status and Control Register (TSC) . . . . . . . . . . . . . . . . . 152
10-5 TIM Counter Registers High (TCNTH) . . . . . . . . . . . . . . . . . . 154
10-6 TIM Counter Registers Low (TCNTL) . . . . . . . . . . . . . . . . . . . 155
10-7 TIM Counter Modulo Register High (TMODH) . . . . . . . . . . . . 155
10-8 TIM Counter Modulo Register Low (TMODL) . . . . . . . . . . . . . 155
10-9 TIM Channel 0 Status and Control Register (TSC0) . . . . . . . 156
Internal Reset Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Sources of Internal Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
POR Recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Interrupt Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Interrupt Entry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Monitor Mode Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
Low-Voltage Monitor Mode Entry Flowchart. . . . . . . . . . . . . . 127
Monitor Data Format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
Break Transaction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .129
Read Transaction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .130
Write Transaction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
Stack Pointer at Monitor Mode Entry . . . . . . . . . . . . . . . . . . . 134
Monitor Mode Entry Timing. . . . . . . . . . . . . . . . . . . . . . . . . . .135
List of Figures
Title
MC68HC908JB16
Freescale Semiconductor
Rev. 1.1
Page

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