MC68HC908GR8CDW Freescale Semiconductor, MC68HC908GR8CDW Datasheet - Page 88

no-image

MC68HC908GR8CDW

Manufacturer Part Number
MC68HC908GR8CDW
Description
IC MCU 8K FLASH 8MHZ 28-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908GR8CDW

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
17
Program Memory Size
7.5KB (7.5K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Analog-to-Digital Converter (ADC)
5.8.3 ADC Clock Register
Technical Data
88
Address: $0003E
The ADC clock register (ADCLK) selects the clock frequency for the
ADC.
ADIV2–ADIV0 — ADC Clock Prescaler Bits
ADICLK — ADC Input Clock Select Bit
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
ADIV2–ADIV0 form a 3-bit field which selects the divide ratio used by
the ADC to generate the internal ADC clock.
available clock configurations. The ADC clock should be set to
approximately 1 MHz.
ADICLK selects either the bus clock or CGMXCLK as the input clock
source to generate the internal ADC clock. Reset selects CGMXCLK
as the ADC clock source.
For More Information On This Product,
ADIV2
Bit 7
Analog-to-Digital Converter (ADC)
X = don’t care
0
ADIV2
Go to: www.freescale.com
Figure 5-4. ADC Clock Register (ADCLK)
0
0
0
0
1
= Unimplemented
ADIV1
Table 5-2. ADC Clock Divide Ratio
6
0
ADIV1
0
0
1
1
X
ADIV0
5
0
ADIV0
ADICLK
X
0
1
0
1
4
0
ADC input clock
ADC input clock
ADC input clock
ADC input clock
ADC input clock
3
0
0
ADC Clock Rate
MC68HC908GR8 — Rev 4.0
Table 5-2
2
0
0
1
2
4
8
16
shows the
1
0
0
MOTOROLA
Bit 0
0
0

Related parts for MC68HC908GR8CDW