MC68332ACPV25 Freescale Semiconductor, MC68332ACPV25 Datasheet - Page 64

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MC68332ACPV25

Manufacturer Part Number
MC68332ACPV25
Description
IC MCU 32-BIT 25MHZ A MASK
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68332ACPV25

Core Processor
CPU32
Core Size
32-Bit
Speed
25MHz
Connectivity
EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
15
Program Memory Type
ROMless
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Other names
Q1501580

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6 Queued Serial Module
6.1 Overview
64
MOTOROLA
The QSM contains two serial interfaces, the queued serial peripheral interface (QSPI) and the serial
communication interface (SCI).
The QSPI provides easy peripheral expansion or interprocessor communication through a full-duplex,
synchronous, three-line bus: data in, data out, and a serial clock. Four programmable peripheral chip-
select pins provide addressability for up to 16 peripheral devices. A self-contained RAM queue allows
up to 16 serial transfers of 8 to 16 bits each, or transmission of a 256-bit data stream without CPU in-
tervention. A special wraparound mode supports continuous sampling of a serial peripheral, with auto-
matic QSPI RAM updating, which makes the interface to A/D converters more efficient.
The SCI provides a standard nonreturn to zero (NRZ) mark/space format. It operates in either full- or
half-duplex mode. There are separate transmitter and receiver enable bits and dual data buffers. A
modulus-type baud rate generator provides rates from 64 to 524 kbaud with a 16.78-MHz system clock,
or 110 to 655 kbaud with a 20.97-MHz system clock. Word length of either 8 or 9 bits is software select-
able. Optional parity generation and detection provide either even or odd parity check capability. Ad-
vanced error detection circuitry catches glitches of up to 1/16 of a bit time in duration. Wakeup functions
allow the CPU to run uninterrupted until meaningful data is available.
An address map of the QSM is shown below.
IMB
Freescale Semiconductor, Inc.
For More Information On This Product,
INTERFACE
LOGIC
QSPI
SCI
Figure 13 QSM Block Diagram
Go to: www.freescale.com
PORT QS
MISO/PQS0
MOSI/PQS1
SCK/PQS2
PCS0/SS/PQS3
PCS1/PQS4
PCS2/PQS5
PCS3/PQS6
RXD
TXD/PQS7
QSM BLOCK
MC68332TS/D
MC68332

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