MC68332ACPV25 Freescale Semiconductor, MC68332ACPV25 Datasheet - Page 13

• Manufacturer Part Number: MC68332ACPV25
• Description: IC MCU 32-BIT 25MHZ A MASK
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68332ACPV25

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: Q1501580

2.5 Signal Function
MC68332
MC68332TS/D
Address Bus
Address Strobe
Autovector
Bus Error
Bus Grant
Bus Grant Acknowledge
Breakpoint
Bus Request
System Clockout
Chip Selects
Boot Chip Select
Data Bus
Data Strobe
Data and Size Acknowledge
Development Serial In, Out,
Clock
Crystal Oscillator
Function Codes
Freeze
Halt
Instruction Pipeline
Interrupt Request Level
Master In Slave Out
Clock Mode Select
Master Out Slave In
Port C
Peripheral Chip Select
Port E
Port F
Port QS
Signal Name
Signal Name
XTAL
TSC
TXD
XFC
Table 5 MCU Signal Characteristics (Continued)
Freescale Semiconductor, Inc.
For More Information On This Product,
EXTAL, XTAL Connections for clock synthesizer circuit reference;
DSACK[1:0]
ADDR[23:0]
DATA[15:0]
Mnemonic
DSI, DSO,
MODCLK
CSBOOT
CLKOUT
PCS[3:0]
PQS[7:0]
CS[10:0]
FREEZE
IRQ[7:1]
IFETCH
BGACK
DSCLK
PC[6:0]
FC[2:0]
PE[7:0]
PF[7:0]
BERR
AVEC
BKPT
HALT
IPIPE
MISO
MOSI
BG
BR
DS
Table 6 MCU Signal Function
AS
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24-bit address bus
Indicates that a valid address is on the address bus
Requests an automatic vector during interrupt acknowledge
Indicates that a bus error has occurred
Indicates that the MCU has relinquished the bus
Indicates that an external device has assumed bus mastership
Signals a hardware breakpoint to the CPU
Indicates that an external device requires bus mastership
System clock output
Select external devices at programmed addresses
Chip select for external boot start-up ROM
16-bit data bus
During a read cycle, indicates when it is possible for an external
device to place data on the data bus. During a write cycle, indi-
cates that valid data is on the data bus.
Provide asynchronous data transfers and dynamic bus sizing
Serial I/O and clock for background debugging mode
a crystal or an external oscillator can be used
Identify processor state and current address space
Indicates that the CPU has entered background mode
Suspend external bus activity
Indicate instruction pipeline activity
Provides an interrupt priority level to the CPU
Serial input to QSPI in master mode;
serial output from QSPI in slave mode
Selects the source and type of system clock
Serial output from QSPI in master mode;
serial input to QSPI in slave mode
SIM digital output port signals
QSPI peripheral chip selects
SIM digital I/O port signals
SIM digital I/O port signals
QSM digital I/O port signals
MCU Module
QSM
SIM
SIM
SIM
Function
Signal Type
Output
Output
Input
Input
Active State
MOTOROLA
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