DSP56F805FV80 Freescale Semiconductor, DSP56F805FV80 Datasheet - Page 51

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DSP56F805FV80

Manufacturer Part Number
DSP56F805FV80
Description
IC DSP 80MHZ 31.5K FLASH 144LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxr
Datasheet

Specifications of DSP56F805FV80

Core Processor
56800
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
71KB (35.5K x 16)
Program Memory Type
FLASH
Ram Size
2.5K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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The thermal characterization parameter is measured per JESD51-2 specification using a 40-gauge type T
thermocouple epoxied to the top center of the package case. The thermocouple should be positioned so
that the thermocouple junction rests on the package. A small amount of epoxy is placed over the
thermocouple junction and over about 1mm of wire extending from the junction. The thermocouple wire
is placed flat against the package case to avoid measurement errors caused by cooling effects of the
thermocouple wire.
When heat sink is used, the junction temperature is determined from a thermocouple inserted at the
interface between the case of the package and the interface material. A clearance slot or hole is normally
required in the heat sink. Minimizing the size of the clearance is important to minimize the change in
thermal performance caused by removing part of the thermal interface to the heat sink. Because of the
experimental difficulties with this technique, many engineers measure the heat sink temperature and then
back-calculate the case temperature using a separate measurement of the thermal resistance of the
interface. From this case temperature, the junction temperature is determined from the junction-to-case
thermal resistance.
5.2 Electrical Design Considerations
Use the following list of considerations to assure correct operation:
Freescale Semiconductor
Use the value obtained by the equation (T
determined by a thermocouple.
Provide a low-impedance path from the board power supply to each V
board ground to each V
The minimum bypass requirement is to place 0.1μF capacitors positioned as close as possible to the package
supply pins. The recommended bypass configuration is to place one bypass capacitor on each of the
V
tolerances.
Ensure that capacitor leads and associated printed circuit traces that connect to the chip V
are less than 0.5 inch per capacitor lead.
Bypass the V
capacitor such as a tantalum capacitor.
DD
/V
SS
pairs, including V
DD
This device contains protective circuitry to guard against
damage due to high static voltage or electrical fields.
However, normal precautions are advised to avoid
application of any voltages higher than maximum rated
voltages to this high-impedance circuit. Reliability of
operation is enhanced if unused inputs are tied to an
appropriate voltage level.
and V
SS
SS
layers of the PCB with approximately 100μF, preferably with a high-grade
pin.
DDA
/V
56F805 Technical Data, Rev. 16
SSA.
Ceramic and tantalum capacitors tend to provide better performance
J
CAUTION
– T
T
)/P
D
where T
T
is the temperature of the package case
DD
pin on the controller, and from the
Electrical Design Considerations
DD
and V
SS
pins
51

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