DSP56F805FV80 Freescale Semiconductor, DSP56F805FV80 Datasheet - Page 44
DSP56F805FV80
Manufacturer Part Number
DSP56F805FV80
Description
IC DSP 80MHZ 31.5K FLASH 144LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxr
Datasheet
1.DSP56F805FV80E.pdf
(56 pages)
Specifications of DSP56F805FV80
Core Processor
56800
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
71KB (35.5K x 16)
Program Memory Type
FLASH
Ram Size
2.5K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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3.14 JTAG Timing
44
TCK frequency of operation
TCK cycle time
TCK clock pulse width
TMS, TDI data set-up time
TMS, TDI data hold time
TCK low to TDO data valid
TCK low to TDO tri-state
TRST assertion time
DE assertion time
1. Timing is both wait state- and frequency-dependent. For the values listed, T = clock cycle. For 80MHz operation,
T = 12.5ns.
2. TCK frequency of operation must be less than 1/8 the processor rate.
3. Parameters listed are guaranteed by design.
MSCAN_RX
CAN receive
Operating Conditions: V
(Input)
TCK
data pin
(Input)
V
M
= V
IL
+ (V
Characteristic
IH
Figure 3-29 Test Clock Input Timing Diagram
– V
SS
2
= V
IL
)/2
Figure 3-28 Bus Wakeup Detection
SSA
V
IH
= 0 V, V
Table 3-18 JTAG Timing
56F805 Technical Data, Rev. 16
DD
= V
T
DDA
t
V
V
PW
M
IL
WAKEUP
= 3.0–3.6 V, T
Symbol
t
t
CY
TRST
t
f
t
t
t
t
t
t
PW
OP
DH
CY
DS
DV
TS
DE
A
= –40° to +85°C, C
1, 3
t
PW
Min
100
DC
0.4
1.2
V
50
50
4T
—
—
M
L
≤
50pF, f
Max
26.6
23.5
10
—
—
—
—
—
—
Freescale Semiconductor
OP
= 80MHz
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns