MC68HC16Z1CPV16 Freescale Semiconductor, MC68HC16Z1CPV16 Datasheet - Page 389

• Manufacturer Part Number: MC68HC16Z1CPV16
• Description: IC MPU 1K RAM 16MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CPV16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

D.2.15 Software Watchdog Service Register
SWSR — Software Watchdog Service Register
D.2.16 Port C Data Register
PORTC — Port C Data Register
D.2.17 Chip-Select Pin Assignment Registers
CSPAR0 — Chip-Select Pin Assignment Register 0
M68HC16 Z SERIES
USER’S MANUAL
NOTES:
15
15
15
0
0
RESET:
RESET:
RESET:
1. This register is shown with a read value.
This register can be read or written at any time. Bits [15:8] are unimplemented and will
always read zero.
To reset the software watchdog:
Both writes must occur in the order specified before the software watchdog times out,
but any number of instructions can occur between the two writes.
This register latches data for chip-select pins configured as discrete outputs. This reg-
ister can be read or written at any time. Bits [15:8] are unimplemented and will always
read zero.
Chip-select pin assignment registers configure the chip-select pins for discrete I/O, an
alternate function, or as an 8-bit or 16-bit chip-select. The possible encodings for each
2-bit field in CSPAR[0:1] (except for CSBTPA[1:0]) are shown in
1. Write $55 to SWSR.
2. Write $AA to SWSR.
14
0
0
DATA2
13
CS5PA[1:0]
12
NOT USED
NOT USED
1
DATA2
Freescale Semiconductor, Inc.
11
CS4PA[1:0]
For More Information On This Product,
10
1
Go to: www.freescale.com
DATA2
REGISTER SUMMARY
CS3PA[1:0]
9
8
8
8
1
DATA1
CS2PA[1:0]
7
0
7
0
0
7
1
PC6
6
0
6
1
6
1
DATA1
PC5
CS1PA[1:0]
5
0
5
1
5
PC4
4
SWSR[7:0]
0
4
1
4
1
DATA1
PC3
Table
CS0PA[1:0]
3
0
3
1
3
PC2
2
0
2
1
2
1
D-8.
$YFFA26
$YFFA40
$YFFA44
PC1
CSBTPA[1:0]
1
0
1
1
1
1
DATA0
D-15
PC0
0
0
0
1
0