MC68HC908GP32CFB Freescale Semiconductor, MC68HC908GP32CFB Datasheet - Page 230

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MC68HC908GP32CFB

Manufacturer Part Number
MC68HC908GP32CFB
Description
IC MCU 8MHZ 32K FLASH 44-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908GP32CFB

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFP
For Use With
M68EVB908GP32 - BOARD EVALUATION FOR HC908GP32
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Input/Output (I/O) Ports
16.6.2 Data Direction Register D
Technical Data
228
NOTE:
NOTE:
Address:
Data direction register D (DDRD) determines whether each port D pin is
an input or an output. Writing a logic 1 to a DDRD bit enables the output
buffer for the corresponding port D pin; a logic 0 disables the output
buffer.
DDRD7–DDRD0 — Data Direction Register D Bits
Avoid glitches on port D pins by writing to the port D data register before
changing data direction register D bits from 0 to 1.
Figure 16-15
For those devices packaged in a 40-pin dual in-line package, PTD6 and
PTD7 are not connected. DDRD6 and DDRD7 should be set to a 1 to
configure PTD6 and PTD7 as outputs.
Reset:
Read:
Write:
These read/write bits control port D data direction. Reset clears
DDRD7–DDRD0, configuring all port D pins as inputs.
1 = Corresponding port D pin configured as output
0 = Corresponding port D pin configured as input
DDRD7
$0007
Bit 7
Figure 16-14. Data Direction Register D (DDRD)
0
shows the port D I/O logic.
Input/Output (I/O) Ports
DDRD6
6
0
DDRD5
5
0
DDRD4
MC68HC908GP32
4
0
DDRD3
3
0
DDRD2
MC68HC08GP32
2
0
DDRD1
1
0
MOTOROLA
DDRD0
Bit 0
Rev. 6
0

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