UPSD3454E-40U6 STMicroelectronics, UPSD3454E-40U6 Datasheet - Page 110
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UPSD3454E-40U6
Manufacturer Part Number
UPSD3454E-40U6
Description
MCU 8BIT 8032 256K FLASH 80-TQFP
Manufacturer
STMicroelectronics
Series
µPSDr
Datasheet
1.UPSD3422EV-40U6.pdf
(300 pages)
Specifications of UPSD3454E-40U6
Core Processor
8032
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
288KB (288K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
For Use With
497-5518 - EVAL BOARD RFID READER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Serial UART interfaces
21.3
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Table 68.
UART baud rates
The baud rate in Mode 0 is fixed:
The baud rate in Mode 2 depends on the value of the bit SMOD in the SFR named PCON. If
SMOD = 0 (default value), the baud rate is 1/64 the oscillator frequency, f
the baud rate is 1/32 the oscillator frequency.
Baud rates in Modes 1 and 3 are determined by the Timer 1 or Timer 2 overflow rate.
Bit
7
6
5
4
3
2
1
0
Mode 0 Baud Rate = f
Mode 2 Baud Rate = (2
SCON1 register bit definition
Symbol
REN
SM0
SM1
SM2
TB8
RB8
RI
TI
R,W
R/W
R,W
R,W
R,W
R,W
R,W
R,W
R,W
OSC
SMOD
Serial Mode Select, See
Important, notice bit order of SM0 and SM1.
[SM0:SM1] = 00b, Mode 0
[SM0:SM1] = 01b, Mode 1
[SM0:SM1] = 10b, Mode 2
[SM0:SM1] = 11b, Mode 3
Serial Multiprocessor Communication Enable.
Mode 0: SM2 has no effect but should remain 0.
Mode 1: If SM2 = 0 then stop bit ignored. SM2 =1 then RI
active if stop bit = 1.
Mode 2 and 3: Multiprocessor Comm Enable. If SM2=0, 9th
bit is ignored. If SM2=1, RI active when 9th bit = 1.
Receive Enable.
If REN=0, UART reception disabled. If REN=1, reception is
enabled
TB8 is assigned to the 9th transmission bit in Mode 2 and 3.
Not used in Mode 0 and 1.
Mode 0: RB8 is not used.
Mode 1: If SM2 = 0, the RB8 is the level of the received stop
bit.
Mode 2 and 3: RB8 is the 9th data bit that was received in
Mode 2 and 3.
Transmit Interrupt flag.
Causes interrupt at end of 8th bit time when transmitting in
Mode 0, or at beginning of stop bit transmission in other
modes. Must clear flag with firmware.
Receive Interrupt flag.
Causes interrupt at end of 8th bit time when receiving in Mode
0, or halfway through stop bit reception in other modes (see
SM2 for exception). Must clear this flag with firmware.
/ 12
/ 64) x f
UPSD3422, UPSD3433, UPSD3434, UPSD3454
OSC
Table 64 on page
Definition
OSC
108.
. If SMOD = 1,
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