ST7FMC2S4TCE STMicroelectronics, ST7FMC2S4TCE Datasheet - Page 127

• Manufacturer Part Number: ST7FMC2S4TCE
• Description: IC MCU 8BIT 16K FLASH 44-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FMC2S4TCE

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: LINSCI, SPI
• Peripherals: LVD, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-LQFP
• For Use With: 497-8402 - BOARD EVAL COMPLETE INVERTER497-8400 - KIT IGBT PWR MODULE CTRL ST7MC497-6408 - BOARD EVAL BLDC SENSORLESS MOTOR497-4734 - EVAL KIT 3KW POWER DRIVER BOARD497-4733 - EVAL KIT 1KW POWER DRIVER BOARD497-4732 - EVAL KIT 300W POWER DRIVER BOARD497-4731 - EVAL KIT PWR DRIVER CONTROL BRD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

LINSCI™ SERIAL COMMUNICATION INTERFACE (LIN Mode) (cont’d)
If LHE bit is set due to this error during Fields other
than LIN Synch Field or if LASE bit is reset then
the current received Header is discarded and the
SCI searches for a new Break Field.
Note on LIN Header Time-out Limit
According to the LIN specification, the maximum
length of a LIN Header which does not cause a
timeout
T
T
When checking this timeout, the slave node is de-
synchronized for the reception of the LIN Break
and Synch fields. Consequently, a margin must be
allowed, taking into account the worst case: This
occurs when the LIN identifier lasts exactly 10
T
and Synch fields last 49 - 10 = 39T
riods.
Assuming the slave measures these first 39 bits
with a desynchronized clock of 15.5%. This leads
to a maximum allowed Header Length of:
39 x (1/0.845) T
= 56.15 T
A margin is provided so that the time-out occurs
when the header length is greater than 57
T
T
Figure 68. LIN Synch Field Measurement
BIT_MASTER
BIT_MASTER
BIT_MASTER
BIT_SLAVE
BIT_SLAVE
SM = Synch Measurement Register (15 bits)
t
t
BR
CPU
LIN Synch Break
BIT_SLAVE
= Baud Rate period
is
= CPU period
periods. If it is less than or equal to 57
periods, then no timeout occurs.
.
refers to the master baud rate.
periods. In this case, the LIN Break
BIT_MASTER
equal
LPR(n)
Extra
to
’1’
+ 10T
t
1.4 * (34 + 1) = 49
Start
BR
Bit
t
BIT_MASTER
LPR = t
BR
BIT_MASTER
= 16.LP.t
Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7
Measurement = 8.T
BR
/ (16.t
CPU
pe-
CPU
LIN Synch Field
) = Rounding (SM / 128)
LIN Header Length
Even if no timeout occurs on the LIN Header, it is
possible to have access to the effective LIN head-
er Length (T
This allows monitoring at software level the
T
This feature is only available when LHDM bit = 1
or when LASE bit = 1.
Mute Mode and Errors
In mute mode when LHDM bit = 1, if an LHE error
occurs during the analysis of the LIN Synch Field
or if a LIN Header Time-out occurs then the LHE
bit is set but it does not wake up from mute mode.
In this case, the current header analysis is discard-
ed. If needed, the software has to reset LSF bit.
Then the SCI searches for a new LIN header.
In mute mode, if a framing error occurs on a data
(which is not a break), it is discarded and the FE bit
is not set.
When LHDM bit = 1, any LIN header which re-
spects the following conditions causes a wake-up
from mute mode:
- A valid LIN Break Field (at least 11 dominant bits
followed by a recessive bit)
- A valid LIN Synch Field (without deviation error)
- A LIN Identifier Field without framing error. Note
that a LIN parity error on the LIN Identifier Field
does not prevent wake-up from mute mode.
- No LIN Header Time-out should occur during
Header reception.
FRAME_MAX
BR
= SM.t
condition given by the LIN protocol.
HEADER
CPU
) through the LHL register.
ST7MC1xx/ST7MC2xx
Stop
Bit
LPR(n+1)
Next
Start
Bit
127/309
1