UPSD3422E-40T6 STMicroelectronics, UPSD3422E-40T6 Datasheet - Page 48

• Manufacturer Part Number: UPSD3422E-40T6
• Description: MCU 8BIT 8032 64KB FLASH 52TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3422E-40T6

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 80KB (80K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-TQFP, 52-VQFP
• For Use With: 497-5577 - BOARD EVAL USB POWER SWITCH497-5518 - EVAL BOARD RFID READER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: 497-4902

8032 addressing modes
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8032 addressing modes
The 8032 MCU uses 11 different addressing modes listed below:
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Register addressing
This mode uses the contents of one of the registers R0 - R7 (selected by the last three bits
in the instruction opcode) as the operand source or destination. This mode is very efficient
since an additional instruction byte is not needed to identify the operand. For example:
MOV A, R7
Direct addressing
This mode uses an 8-bit address, which is contained in the second byte of the instruction, to
directly address an operand which resides in either 8032 DATA SRAM (internal address
range 00h-07Fh) or resides in 8032 SFR (internal address range 80h-FFh). This mode is
quite fast since the range limit is 256 bytes of internal 8032 SRAM. For example:
MOV A, 40h
Register indirect addressing
This mode uses an 8-bit address contained in either register R0 or R1 to indirectly address
an operand which resides in 8032 IDATA SRAM (internal address range 80h-FFh). Although
8032 SFR registers also occupy the same physical address range as IDATA, SFRs will not
be accessed by register Indirect mode. SFRs may only be accesses using Direct address
mode. For example:
MOV A, @R0
Register
Direct
Register indirect
Immediate
External direct
External indirect
Indexed
Relative
Absolute
Long
Bit
; Move contents of R7 to accumulator
; Move contents of DATA SRAM
; at location 40h into the accumulator
; Move into the accumulator the
; contents of IDATA SRAM that is
; pointed to by the address
; contained in R0.
UPSD3422, UPSD3433, UPSD3434, UPSD3454