Z8F3201AN020EC00TR Zilog, Z8F3201AN020EC00TR Datasheet - Page 46

IC ENCORE MCU FLASH 32K 44LQFP

Z8F3201AN020EC00TR

Manufacturer Part Number
Z8F3201AN020EC00TR
Description
IC ENCORE MCU FLASH 32K 44LQFP
Manufacturer
Zilog
Series
Encore!®r
Datasheet

Specifications of Z8F3201AN020EC00TR

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
31
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
44-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
Z8F3201AN020EC00T

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z8F3201AN020EC00TR
Manufacturer:
Zilog
Quantity:
10 000
Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
®
Z8 Encore!
28
threshold voltage, V
) and forces the device into the Reset state. While the supply volt-
VBO
age remains below the Power-On Reset voltage threshold (V
), the VBO block holds
POR
the Z8F640x family device in the Reset state.
After the supply voltage again exceeds the Power-On Reset voltage threshold, the
Z8F640x family device progresses through a full System Reset sequence, as described in
the Power-On Reset section. Following Power-On Reset, the POR status bit in the Watch-
Dog Timer Control (WDTCTL) register is set to 1. Figure 63 illustrates Voltage Brown-
Out operation. Refer to the Electrical Characteristics chapter for the VBO and POR
threshold voltages (V
and V
).
VBO
POR
Stop mode disables the Voltage Brown-Out detector.
VCC = 3.3V
VCC = 3.3V
V
POR
V
VBO
Program
Voltage
Program
Execution
Brownout
Execution
WDT Clock
Crystal Oscillator
XOUT
Internal RESET
signal
POR
XTAL
counter delay
counter delay
Figure 63. Voltage Brown-Out Reset Operation (not to scale)
Watch-Dog Timer Reset
If the device is in normal or Halt mode, the Watch-Dog Timer can initiate a System Reset
at time-out if the WDT_RES Option Bit is set to 1. This is the default (unprogrammed) set-
ting of the WDT_RES Option Bit. The
status bit in the WDT Control register is set to
WDT
signify that the reset was initiated by the Watch-Dog Timer.
PS017610-0404
Reset and Stop Mode Recovery

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