Z8F0812SJ020EC Zilog, Z8F0812SJ020EC Datasheet - Page 64
![IC ENCORE MCU FLASH 8K 28SOIC](/photos/6/91/69136/269-28-soic_sml.jpg)
Z8F0812SJ020EC
Manufacturer Part Number
Z8F0812SJ020EC
Description
IC ENCORE MCU FLASH 8K 28SOIC
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet
1.Z8F08200100KIT.pdf
(264 pages)
Specifications of Z8F0812SJ020EC
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
269-3228
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Table 15. Port A–C Control Registers (PxCTL)
Table 16. Port A–C Data Direction Sub-Registers
PS022517-0508
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
Port A–C Control Registers
7
7
DD7
If 01H in Port A–C Address Register, accessible through the Port A–C Control Register
The Port A–C Control Registers set the GPIO port operation. The value in the correspond-
ing Port A–C Address Register determines the control sub-registers accessible using the
Port A–C Control Register
PCTL[7:0]—Port Control
The Port Control Register provides access to all sub-registers that configure the GPIO Port
operation.
Port A–C Data Direction Sub-Registers
The Port A–C Data Direction sub-register is accessed through the Port A–C Control
register by writing 01H to the Port A–C Address Register
DD[7:0]—Data Direction
These bits control the direction of the associated port pin. Port Alternate Function
operation overrides the Data Direction register setting.
0 = Output. Data in the Port A–C Output Data Register is driven onto the port pin.
1 = Input. The port pin is sampled and the value written into the Port A–C Input
Port A–C Alternate Function Sub-Registers
The Port A–C Alternate Function sub-register
Port A–C Control Register by writing
Port A–C Alternate Function sub-registers select the alternate functions for the selected
Data Register. The output driver is tri-stated.
6
6
DD6
5
5
DD5
(Table
4
4
FD1H, FD5H, FD9H
DD4
15).
02H
PCTL
R/W
R/W
00H
1
3
3
to the Port A–C Address Register. The
DD3
(Table
17) is accessed through the
2
2
Z8 Encore! XP
DD2
(Table
General-Purpose Input/Output
Product Specification
16).
1
1
DD1
®
F0822 Series
0
0
DD0
51
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