PXAC37KFA/00,512 NXP Semiconductors, PXAC37KFA/00,512 Datasheet - Page 59

• Manufacturer Part Number: PXAC37KFA/00,512
• Description: IC XA MCU 16BIT 32K OTP 44-PLCC
• Manufacturer: NXP Semiconductors
• Series: XAr

Specifications of PXAC37KFA/00,512

• Core Processor: XA
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, SPI, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Other names: 568-3533-5; 935266516512; PXAC37KFA

Philips Semiconductors
MCPLH
MCPLL (Message Complete Status Flags Low)
MCPLL
TxERC (Tx Error Counter)
TXERC
The Tx Error Counter can only be written to when the CAN Core is
in Reset mode. Hardware will preset the register to 128 when a
Bus–Off condition occurs. See the section entitled Bus Off on page
50 for details.
RXERC
The Rx Error Counter can only be written to when the CAN Core is
in Reset mode. When a Bus–Off condition occurs, this register is
cleared to 00h.
EWLR (Error Warning Limit Register)
EWLR
ECCR (Error Code Capture Register)
ECCR
The Error Code Capture Register contains detailed information
about the most recent Bus Error. See Table 25 for details. The
register must be read in order to be re–enabled for capturing the
next error code, as well as to clear the BERR status flag. This
register should be read before enabling the Bus Error interrupt.
ALCR
The ALCR latches the bit number in the CAN Identifier where the
most recent Arbitration Lost occurred. See Table 26 for details. The
register must be read in order to be reenabled for capturing the next
arbitration lost code, as well as to clear the ARBLST status flag.
2000 Jan 25
Obj31
Obj15
Address: MMR base + 224h
Address: MMR base + 274h
Address: MMR base + 276h
Address: MMR base + 278h
XA 16-bit microcontroller family
32K/1024 OTP CAN transport layer controller
1 UART, 1 SPI Port, CAN 2.0B, 32 CAN ID filters, transport layer co-processor
15
15
EWL
RC
EC1
TC
7
7
7
7
7
–
7
7
Obj30
7
Obj14
14
14
Obj29
13
Obj13
13
EWL
EC0
TC
RC
6
6
6
6
6
–
6
6
Obj28
6
12
Obj12
12
Obj27
11
EWL
Obj11
RC
TC
11
5
5
5
5
5
–
5
5
Obj26
5
10
Obj10
10
Obj25
9
EWL
RC
TC
Obj9
4
4
4
4
4
4
9
4
Obj24
4
8
Obj8
52
8
Obj23
7
RxERC (Rx Error Counter)
ALCR (Arbitration Lost Capture Register)
This register should be read before enabling the Arbitration Lost
interrupt.
Access: Read/Clear, byte or word
Reset Value: 0000h
Access: Read, write, R/M/W, byte or word
Reset Value: 00h
Address: MMR base + 275h
Access: Read, write, R/M/W, byte or word
Reset Value: 00h
Access: Read, write, R/M/W, byte or word
Reset Value: 96h
EWL
Access: Read, write, R/M/W, byte or word
Reset Value: 00h
Address: MMR base + 27Ah
Access: Read, write, R/M/W, byte or word
Reset Value: 00h
RC
Obj7
TC
3
3
3
3
3
7
3
3
Obj22
3
6
Obj6
State
6
Obj21
Bit Number
5
Obj5
EWL
RC
TC
5
2
2
2
2
2
2
2
Obj20
2
4
Obj4
4
Obj19
3
Obj3
EWL
3
TC
RC
1
1
1
1
1
1
1
Obj18
1
Preliminary specification
2
Obj2
2
Obj17
Obj1
XA-C3
1
1
EWL
RC
TC
0
0
0
0
0
0
0
Obj16
0
Obj0
0
0