ATTINY167-15MD Atmel, ATTINY167-15MD Datasheet - Page 278
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ATTINY167-15MD
Manufacturer Part Number
ATTINY167-15MD
Description
MCU AVR 16K FLASH 15MHZ 32-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY167-15MD.pdf
(283 pages)
Specifications of ATTINY167-15MD
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 150°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Processor Series
ATTINY1x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
For Use With
ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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29. Errata
29.1
29.1.1
29.1.2
29.1.3
29.2
278
Errata Summary
Errata Description
ATtiny87/ATtiny167
ATtiny87/167 RevC
ATtiny87/167 RevB (Date code >1208)
ATtiny167 RevA (Date code >1207)
1. CRC calculation of diagnostic frames in LIN 2.x.
• Gain control of the crystal oscillator.
• ‘Disable Clock Source’ command remains enabled.
• Gain control of the crystal oscillator.
• ‘Disable Clock Source’ command remains enabled.
• LIN Break Delimiter.
• CRC calculation of diagnostic frames in LIN 2.x.
• Gain control of the crystal oscillator.
• ‘Disable Clock Source’ command remains enabled.
• Comparison between ADC inputs and voltage references.
• Register bits of DIDR1.
• LIN Break Delimiter.
Diagnostic frames of LIN 2.x use “classic checksum” calculation. Unfortunately, the setting
of the checksum model is enabled when the HEADER is transmitted/received. Usually, in
LIN 2.x the LIN/UART controller is initialized to process “enhanced checksums” and a
slave task does not know what kind of frame it will work on before checking the ID.
Problem fix / workaround.
This workaround is to be implemented only in case of transmission/reception of diagnostic
frames.
a. Slave task of master node:
b. For slaves nodes, the workaround is in 2 parts:
Before enabling the HEADER, the master must set the appropriate LIN13 bit value in
LINCR register.
– Before enabling the RESPONSE, use the following function:
void
unsigned char
}
temp = LINBTR;
LINCR = 0x00;
LINBTR = (1<<LDISR)|temp;
LINCR
LINDLR = 0x88;
lin_wa_head(void) {
= (1<<LIN13)|(1<<LENA)|(0<<LCMD2)|(0<<LCMD1)|(0<<LCMD0);
temp;
// It is not a RESET !
// If it isn't already done
7728G–AVR–06/10
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