AT91M63200-25AU Atmel, AT91M63200-25AU Datasheet - Page 38
AT91M63200-25AU
Manufacturer Part Number
AT91M63200-25AU
Description
IC MCU ARM7 176-TQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91M63200-25AI.pdf
(153 pages)
Specifications of AT91M63200-25AU
Core Processor
ARM7
Core Size
16/32-Bit
Speed
25MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
POR, WDT
Number Of I /o
58
Program Memory Type
OTP
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
176-TQFP, 176-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91M63200-25AU
Manufacturer:
NSC
Quantity:
1 670
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MPI Arbitration
Figure 35 below shows the hardware protocol on the bus
request and bus grant signals.
Figure 35. External Arbitration
The following diagram shows the actions which must be
performed by the external processor to take control of the
MPI.
Figure 36. MPI Control
38
MPI_D[15:0]
MPI_BG
MPI_BR
t
1
AT91M63200
De-assert MPI_BR
Assert MPI_BR
Read/Write MPI
MPI_BG
asserted
yes
Data Transfer
no
t
2
The MPI guarantees a maximum delay to assert the bus
grant signal. Any AT91M63200 instruction execution in
progress (even Swap and Load/Store Multiple) is stopped.
If the ARM core is not accessing the DPRAM, the delay t
is one MCKI cycle plus the propagation time. If the ARM
core is accessing the DPRAM, the delay can be up to four
MCKI cycles to allow the current instruction to be stopped
cleanly (Swap or Load/Store Multiple instructions).
As the de-assertion of the bus grant signal is asynchro-
nous, t
Note that the read/write MPI sequence must be as short as
possible in order to reduce to a minimum the risk of stop-
ping the AT91 in case it needs to access the MPI, or to
reduce the time during which it is stopped.
After having performed these actions, the external proces-
sor must inform the AT91M63200 that data has been read
or written. This may be done by positioning an external
interrupt signal NIRQ0-NIRQ3 or NFIQ, or by flagging. In
the last case, a memory space in the MPI must be reserved
for this flag and the AT91M63200 application software
must poll it to detect an update by the external processor.
The flag must be de-asserted after treatment by the
AT91M63200 application software.
2
is in all cases less than one MCKI cycle.
1
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