AT87C51RB2-SLSUM Atmel, AT87C51RB2-SLSUM Datasheet - Page 19
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AT87C51RB2-SLSUM
Manufacturer Part Number
AT87C51RB2-SLSUM
Description
IC 8051 MCU 16K OTP 40MHZ 44PLCC
Manufacturer
Atmel
Series
87Cr
Datasheet
1.TS87C51RB2-VIA.pdf
(86 pages)
Specifications of AT87C51RB2-SLSUM
Core Processor
8051
Core Size
8-Bit
Speed
40/20MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (16K x 8)
Program Memory Type
OTP
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
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6.2
6.2.1
4188F–8051–01/08
Timer 2
Auto-reload Mode
The timer 2 in the
It is a 16-bit timer/counter: the count is maintained by two eight-bit timer registers, TH2 and TL2,
connected in cascade. It is controlled by T2CON register (See Table 6-2) and T2MOD register
(See Table 6-3). Timer 2 operation is similar to Timer 0 and Timer 1. C/T2 selects F
operation) or external pin T2 (counter operation) as the timer clock input. Setting TR2 allows TL2
to be incremented by the selected input.
Timer 2 has 3 operating modes: capture, autoreload and Baud Rate Generator. These modes
are selected by the combination of RCLK, TCLK and CP/RL2 (T2CON), as described in the
Atmel 8-bit Microcontroller Hardware description.
Refer to the Atmel 8-bit Microcontroller Hardware description for the description of Capture and
Baud Rate Generator Modes.
In
The auto-reload mode configures timer 2 as a 16-bit timer or event counter with automatic
reload. If DCEN bit in T2MOD is cleared, timer 2 behaves as in 80C52 (refer to the Atmel 8-bit
Microcontroller Hardware description). If DCEN bit is set, timer 2 acts as an Up/down
timer/counter as shown in Figure 6-2. In this mode the T2EX pin controls the direction of count.
When T2EX is high, timer 2 counts up. Timer overflow occurs at FFFFh which sets the TF2 flag
and generates an interrupt request. The overflow also causes the 16-bit value in RCAP2H and
RCAP2L registers to be loaded into the timer registers TH2 and TL2.
When T2EX is low, timer 2 counts down. Timer underflow occurs when the count in the timer
registers TH2 and TL2 equals the value stored in RCAP2H and RCAP2L registers. The under-
flow sets TF2 flag and reloads FFFFh into the timer registers.
The EXF2 bit toggles when timer 2 overflows or underflows according to the the direction of the
count. EXF2 does not generate any interrupt. This bit can be used to provide 17-bit resolution.
• Auto-reload mode with up or down counter
• Programmable clock-output
TS80C51RX2
TS80C51RX2
Timer 2 includes the following enhancements:
is compatible with the timer 2 in the 80C52.
AT/TS8xC51Rx2
OSC
/12 (timer
19