ATMEGA8515L-8JJ Atmel, ATMEGA8515L-8JJ Datasheet - Page 127
![IC MCU AVR 8K 5V 8MHZ 44-PLCC](/photos/6/70/67043/453-44-plcc_sml.jpg)
ATMEGA8515L-8JJ
Manufacturer Part Number
ATMEGA8515L-8JJ
Description
IC MCU AVR 8K 5V 8MHZ 44-PLCC
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA8515L-8JJ
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- Current page: 127 of 257
- Download datasheet (2Mb)
2512K–AVR–01/10
When configured as a Master, the SPI interface has no automatic control of the SS line.
This must be handled by user software before communication can start. When this is
done, writing a byte to the SPI Data Register starts the SPI clock generator, and the
hardware shifts the 8 bits into the Slave. After shifting one byte, the SPI clock generator
stops, setting the end of Transmission Flag (SPIF). If the SPI Interrupt Enable bit (SPIE)
in the SPCR Register is set, an interrupt is requested. The Master may continue to shift
the next byte by writing it into SPDR, or signal the end of packet by pulling high the
Slave Select, SS line. The last incoming byte will be kept in the Buffer Register for later
use.
When configured as a Slave, the SPI interface will remain sleeping with MISO tri-stated
as long as the SS pin is driven high. In this state, software may update the contents of
the SPI Data Register, SPDR, but the data will not be shifted out by incoming clock
pulses on the SCK pin until the SS pin is driven low. As one byte has been completely
shifted, the end of Transmission Flag, SPIF is set. If the SPI Interrupt Enable bit, SPIE,
in the SPCR Register is set, an interrupt is requested. The Slave may continue to place
new data to be sent into SPDR before reading the incoming data. The last incoming byte
will be kept in the Buffer Register for later use.
Figure 61. SPI Master-Slave Interconnection
The system is single buffered in the transmit direction and double buffered in the receive
direction. This means that bytes to be transmitted cannot be written to the SPI Data
Register before the entire shift cycle is completed. When receiving data, however, a
received character must be read from the SPI Data Register before the next character
has been completely shifted in. Otherwise, the first byte is lost.
In SPI Slave mode, the control logic will sample the incoming signal of the SCK pin. To
ensure correct sampling of the clock signal, the minimum low and high periods should
be:
Low periods: Longer than 2 CPU clock cycles.
High periods: Longer than 2 CPU clock cycles.
When the SPI is enabled, the data direction of the MOSI, MISO, SCK, and SS pins is
overridden according to Table 55. For more details on automatic port overrides, refer to
“Alternate Port Functions” on page 64.
Table 55. SPI Pin Overrides
MOSI
Pin
CLOCK GENERATOR
MSB
8-BIT SHIFT REGISTER
Direction, Master SPI
User Defined
SPI
MASTER
(1)
LSB
V
MISO
MOSI
SCK
SS
CC
MISO
MOSI
SCK
SS
Direction, Slave SPI
Input
MSB
8-BIT SHIFT REGISTER
ATmega8515(L)
SLAVE
SHIFT
ENABLE
LSB
127
Related parts for ATMEGA8515L-8JJ
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![ATMEGA128RFA1-ZU](/photos/12/13/121326/313-64-qfn_tmb.jpg)
Part Number:
Description:
IC AVR MCU 2.4GHZ XCEIVER 64QFN
Manufacturer:
Atmel
Datasheet:
![ATMEGA328P-20PU](/images/manufacturer_photos/0/0/78/atmel_tmb.jpg)
Part Number:
Description:
Manufacturer:
Atmel
Datasheet:
![ATMEGA64RZAV-10PU](/photos/14/18/141872/atmega64rzav-10pu_tmb.jpg)
Part Number:
Description:
MCU ATMEGA644/AT86RF230 40-DIP
Manufacturer:
Atmel
Datasheet:
![ATMEGA64RZAPV-10MU](/photos/12/13/121326/313-64-qfn_tmb.jpg)
Part Number:
Description:
BUNDLE ATMEGA644P/AT86RF230 QFN
Manufacturer:
Atmel
Datasheet:
![ATMEGA64RZAPV-10AU](/photos/6/70/67042/313-44-tqfp_tmb.jpg)
Part Number:
Description:
BUNDLE ATMEGA644P/AT86RF230 TQFP
Manufacturer:
Atmel
Datasheet:
![ATMEGA128RZAV-8AU](/photos/12/13/121332/313-64-tqfp_tmb.jpg)
Part Number:
Description:
MCU ATMEGA1281/AT86RF230 64-TQFP
Manufacturer:
Atmel
Datasheet:
![ATMEGA128RZBV-8AU](/photos/6/70/67048/313-100-tqfp_tmb.jpg)
Part Number:
Description:
MCU ATMEGA1280/AT86RF230 100TQFP
Manufacturer:
Atmel
Datasheet:
![ATMEGA128RZBV-8CU](/photos/6/70/67048/313-100-tqfp_tmb.jpg)
Part Number:
Description:
BUNDLE ATMEGA1280/AT86RF100-TQFP
Manufacturer:
Atmel
Datasheet:
![ATMEGA256RZBV-8CU](/photos/6/89/68968/313-100-cbga_tmb.jpg)
Part Number:
Description:
BUNDLE ATMEGA2560V/AT86RF230-ZU
Manufacturer:
Atmel
Datasheet:
![ATMEGA256RZAV-8AU](/photos/12/13/121332/313-64-tqfp_tmb.jpg)
Part Number:
Description:
MCU ATMEGA2561/AT86RF230 64-TQFP
Manufacturer:
Atmel
Datasheet:
![U641B](/images/manufacturer_photos/0/0/79/atmel_corporation_tmb.jpg)
Part Number:
Description:
INTERVAL AND WIPE/WASH WIPER CONTROL IC WITH DELAY
Manufacturer:
ATMEL Corporation
Datasheet:
![U4082B](/images/manufacturer_photos/0/0/79/atmel_corporation_tmb.jpg)
Part Number:
Description:
Low-Voltage Voice-Switched IC for Hands-Free Operation
Manufacturer:
ATMEL Corporation
Datasheet:
![U4089B](/images/manufacturer_photos/0/0/79/atmel_corporation_tmb.jpg)
Part Number:
Description:
MONOLITHIC INTEGRATED FEATUREPHONE CIRCUIT
Manufacturer:
ATMEL Corporation
Datasheet:
![U4255BM-M](/images/manufacturer_photos/0/0/79/atmel_corporation_tmb.jpg)
Part Number:
Description:
AM-FM Receiver IC U4255BM-M
Manufacturer:
ATMEL Corporation
Datasheet: