ATMEGA48-20MJ Atmel, ATMEGA48-20MJ Datasheet - Page 108
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ATMEGA48-20MJ
Manufacturer Part Number
ATMEGA48-20MJ
Description
IC AVR MCU 4K 5V 20MHZ 32-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA48-20MJ
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATMEGA48-24MJ
ATMEGA48-24MJ
ATMEGA48-24MJ
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15.2.1
108
ATmega48/88/168
Registers
Figure 15-1. 16-bit Timer/Counter Block Diagram
Note:
The Timer/Counter (TCNT1), Output Compare Registers (OCR1A/B), and Input Capture Regis-
ter (ICR1) are all 16-bit registers. Special procedures must be followed when accessing the 16-
bit registers. These procedures are described in the section
page
CPU access restrictions. Interrupt requests (abbreviated to Int.Req. in the figure) signals are all
visible in the Timer Interrupt Flag Register (TIFR1). All interrupts are individually masked with
the Timer Interrupt Mask Register (TIMSK1). TIFR1 and TIMSK1 are not shown in the figure.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on
the T1 pin. The Clock Select logic block controls which clock source and edge the Timer/Counter
uses to increment (or decrement) its value. The Timer/Counter is inactive when no clock source
is selected. The output from the Clock Select logic is referred to as the timer clock (clk
The double buffered Output Compare Registers (OCR1A/B) are compared with the Timer/Coun-
ter value at all time. The result of the compare can be used by the Waveform Generator to
generate a PWM or variable frequency output on the Output Compare pin (OC1A/B).
109. The Timer/Counter Control Registers (TCCR1A/B) are 8-bit registers and have no
1. Refer to
Timer/Counter1 pin placement and description.
Timer/Counter
Figure 1-1 on page
TCCRnA
OCRnA
OCRnB
TCNTn
ICRn
=
=
Direction
Count
Clear
2,
Table 13-3 on page 77
Control Logic
TOP
=
TCCRnB
Values
BOTTOM
Fixed
TOP
ICFn (Int.Req.)
(1)
clk
Detector
Edge
=
Tn
0
and
“Accessing 16-bit Registers” on
OCnA
(Int.Req.)
OCnB
(Int.Req.)
TOVn
(Int.Req.)
Clock Select
Generation
Generation
Table 13-9 on page 83
( From Prescaler )
Waveform
Waveform
Canceler
Detector
Noise
Edge
Comparator Ouput )
( From Analog
2545S–AVR–07/10
OCnA
OCnB
T
See “Out-
ICPn
1
Tn
).
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