AT89C5122D-RDVIM Atmel, AT89C5122D-RDVIM Datasheet - Page 47
![IC 8051 MCU W/SMART CARD 64VQFP](/photos/6/81/68127/313-64-vqfp_sml.jpg)
AT89C5122D-RDVIM
Manufacturer Part Number
AT89C5122D-RDVIM
Description
IC 8051 MCU W/SMART CARD 64VQFP
Manufacturer
Atmel
Series
89Cr
Datasheet
1.AT89C5122D-PSTUM.pdf
(208 pages)
Specifications of AT89C5122D-RDVIM
Core Processor
8051
Core Size
8-Bit
Speed
48MHz
Connectivity
SmartCard, SPI, UART/USART, USB
Peripherals
LED, POR, WDT
Number Of I /o
46
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
For Use With
AT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-03 - KIT STARTER FOR MCU AT8XC5122/23
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
AT89C5122D-RDTIM
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Alternate Card Clock
DC/DC Converter Clock
4202F–SCR–07/2008
If the CK_CPU <= 4/3 * CK_ISO, the SCIB doesn’t work.
If the CK_CPU >= 6* CK_ISO, the programmer must take care of three cases:
•
•
•
To avoid any trouble, a delay must be added between the two accesses on the SCIB
register. The SCIB must complete the first read (or write) operation before to receive the
second. A solution is to add NOP (no operation) instructions. The number of NOP to add
depends of the rate between CK_CPU and CK_ISO (see table below).
The alternate Card uses the peripheral clock divided by the PR3 prescaler. (1; 1/2; 1/4;
1/8 division ratio). See Section "Alternate Card", page 76 for the definition of the alter-
nate clock.
The DC/DC block needs a clock with a 50% duty cycle. The frequency must also be
included in the range 3.68 MHz and 6 MHz. The PR4 prescaler is used to configure the
DC/DC frequency.
Linked registers
Write in SCICR and after read of SCETU0-1
Write in SCIBUF and after read of SCISR
Wait after Write operation on this registers
SCICR, SCIER, SCETU0-1,SCGT0-1,
SCWT0-3,SCCON
Min CLK_CPU
CLK_CPU >= 6 * CLK_ISO
CLK_CPU >= 12* CLK_ISO
XTAL1 (MHz)
Read (or write) operation on a SCIB register followed immediatly with an other Read
(or write) operation on the same register.
Read (or write) operation on a SCIB register followed immediatly with an other Read
(or write) operation on a linked register. The list of linked registers is in the table
below.
Write operation on a register of the list below followed immediatly with a read
operation on a SCIB register.
8
DCCKPS3:0 value
0
CLK_CPU <= 12 * CLK_ISO
CLK_CPU <= 16 * CLK_ISO
Max CLK_CPU
AT83R5122, AT8xC5122/23
Prescaler Factor
2
DC/DC converter CLK (MHz)
Number of
CPU cycles to add
6 ( example1 NOP)
12 ( example 2 NOP)
4
47
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