PIC18F2515-E/SP Microchip Technology, PIC18F2515-E/SP Datasheet - Page 2

IC MCU FLASH 24KX16 28-DIP

PIC18F2515-E/SP

Manufacturer Part Number
PIC18F2515-E/SP
Description
IC MCU FLASH 24KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2515-E/SP

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
For Use With
DVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
PIC18F2515/2610/4515/4610
2. Module: MSSP
3. Module: MSSP
4. Module: MSSP
DS80199E-page 2
When the MSSP is configured for SPI Master
mode, the SDO pin cannot be disabled by setting
the TRISC<5> bit. The SDO pin always outputs
the content of SSPBUF regardless of the state of
the TRIS bit.
Work around
Use Rev. A4 silicon devices.
Date Codes that pertain to this issue:
All engineering and production devices.
After an I
register may be written for up to 10 T
additional writes are blocked. The data transfer
may be corrupted if SSPBUF is written during this
time.
The WCOL bit is set any time an SSPBUF write
occurs during a transfer.
Work around
Avoid writing SSPBUF until the data transfer is
complete, indicated by the setting of the SSPIF bit
(PIR1<3>).
Verify the WCOL bit (SSPCON1<7>) is clear after
writing SSPBUF to ensure any potential transfer in
progress is not corrupted.
Date Codes that pertain to this issue:
All engineering and production devices.
In 10-Bit Addressing mode, when a Repeated Start
is issued followed by the high address byte and a
write command (R/W = 0), an ACK is not issued.
Work around
There are two work arounds available:
1. Single Master Environment:
In a single master environment, the user must
issue a Stop, then a Start followed by a write to the
address high, then the address low followed by the
data.
2. Multi-Master Environment:
In a multi-master environment, the user must issue
a Repeated Start, send a dummy write command
to a different address, issue another Repeated
Start and then send a write to the original address.
This procedure will help maintain control of the
bus.
Date Codes that pertain to this issue:
All engineering and production devices.
2
C transfer is initiated, the SSPBUF
CY
before
5. Module: ECCP
6. Module: ECCP
EXAMPLE 1:
7. Module: ECCP
When the ECCP1 auto-shutdown feature is
configured for automatic restart by setting the
PRSEN bit (PWM1CON<7>), the pulse terminates
immediately in a shutdown event. In addition, the
pulse may restart within the period if the shutdown
condition expires. This may result in the generation
of short pulses on the PWM output(s).
Work around
Configure the auto-shutdown for software restart
by clearing the PRSEN bit (PWM1CON<7>). The
PWM can be re-enabled by clearing the
ECCPASE bit (ECCP1AS<7>) after the shutdown
condition expires.
Date Codes that pertain to this issue:
All engineering and production devices.
When monitoring a shutdown condition using a bit
test on the ECCPASE bit (ECCP1AS<7>), or
performing a bit operation on the ECCPASE bit,
the device may produce unexpected results.
Work around
Before performing a bit test or bit operation on the
ECCPASE bit, copy the ECCP1AS register to the
working register and perform the operation there.
By avoiding these operations on the ECCPASE bit
in the ECCP1AS register, the module will operate
normally.
In Example 1, ECCPASE bit operations are
performed on the W register.
Date Codes that pertain to this issue:
All engineering and production devices.
The auto-shutdown source, FLT0, has inverse
polarity from the description in Section 15.4.7
“Enhanced PWM Auto-Shutdown” of the Device
Data Sheet. A logic high-voltage level on FLT0 will
generate a shutdown on ECCP1.
Work around
None.
Date Codes that pertain to this issue:
All engineering and production devices.
MOVF
BTFSC
BRA
ECCP1AS, W
WREG, ECCPASE
SHUTDOWN_ROUTINE
© 2007 Microchip Technology Inc.

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