DSPIC30F6010T-20I/PF Microchip Technology, DSPIC30F6010T-20I/PF Datasheet - Page 7

• Manufacturer Part Number: DSPIC30F6010T-20I/PF
• Description: IC PSPIC MCU/DSP 144K 80TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6010T-20I/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• For Use With: DM300019 - BOARD DEMO DSPICDEM 80L STARTERAC164314 - MODULE SKT FOR PM3 80PFDM300020 - BOARD DEV DSPICDEM MC1 MOTORCTRLAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DSPIC30F6010T20IP

15. Module: Motor Control PWM –
TABLE 2:
17. Module: Motor Control PWM – Output
 2004 Microchip Technology Inc.
0x0100
0x0200
Note 1:
OVDCON
The input clock to the PWM time-base has
prescaler options of 1:1, 1:4, 1:16 or 1:64, selected
by the PTCKPS (PTCON<3:2>) control bits. In this
release of silicon, the options 1:4, 1:16 and 1:64
may produce unexpected results when used to
generate PWM pulses.
Work around
The prescaler should be set to the 1:1 option (i.e.,
prescaler should be disabled) in this release of
silicon when generating PWM pulses.
Unexpected results may occur when the PWM
pins are manually controlled using the OVDCON
register and the OSYNC bit (PWMCON2<1>) is
set.
Work around
Set OSYNC = 0 when the PWM pins are manually
controlled using the OVDCON register.
2:
3:
Other Motor Control PWM SFRs were initialized as follows: PTCON = 0x8002 and PWMCON1 = 0x0011
For these settings of OVDCON, the OSYNC (PWMCON<1>) bit should be cleared to ‘0’ for correct
operation.
Results are shown here for the PWM1H and PWM1L pins only. Similar results will be observed for any
other pair of complementary output pins (PWM2H/L, PWM3H/L and PWM4H/L) and any other chosen duty
cycle.
Dead-Time
Enabled
Time-base Prescalers
Override Synchronization
OUTPUT OVERRIDE: EXPECTED VS. OBSERVED OPERATION
Yes
Yes
PWM1H PWM1L PWM1H PWM1L
Expected Output
PWM
Low
PWM
Low
Advance Information
Observed Output
Low
Low
Low
Low
16. Module: Motor Control PWM – Output
18. Module: Motor Control PWM – Dead Time
Output on PWM1L pin is shortened by dead-time
Output on PWM1H pin is shortened by dead-time
The output override function of the PWM module,
controlled by the OVDCON register produces
unexpected results on the output pins in certain
cases when the module is used in Complementary
mode. These cases are shown in Table 2. Future
releases of silicon will operate as shown in the
“Expected Output” columns in Table 2.
Work around
None.
If the Motor Control PWM module is operated in
Complementary mode with a non-zero dead time,
unexpected results may occur on the PWM output
pins when the PWM pulse widths are less than or
equal to the programmed dead time.
Work around
The maximum and minimum duty cycles should be
limited in software so that the PWM pulse width on
either complimentary output pin is not equal to or
less than the dead time. Then the PWM is used to
drive a motor or similar inductive load, the PWM
pulse width on either complimentary output pin
should be no less than three times the dead time
to avoid distortion of the load current. For pulse
widths less than the dead time, the PWM outputs
can be saturated to 0% or 100% duty cycle by
manual override of the PWM pins.
Override
Generators
dsPIC30F6010
Comments
DS80182E-page 7