PIC18LF4439T-I/ML Microchip Technology, PIC18LF4439T-I/ML Datasheet - Page 288
![IC PIC MCU 6KX16 44QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18LF4439T-I/ML
Manufacturer Part Number
PIC18LF4439T-I/ML
Description
IC PIC MCU 6KX16 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheet
1.PIC18LF4439-IML.pdf
(322 pages)
Specifications of PIC18LF4439T-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
12KB (6K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
640 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
640 B
Interface Type
I2C, SPI, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
32
Number Of Timers
16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DV164005, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC18FXX39
TABLE 23-22: A/D CONVERSION REQUIREMENTS
DS30485A-page 286
130
131
132
135
Note 1: ADRES register may be read on the following T
Param
No.
2: The time for the holding capacitor to acquire the “New” input voltage, when the new input value has not
3: On the next Q4 cycle of the device clock.
4: The time of the A/D clock period is dependent on the device frequency and the T
T
T
T
T
Symbol
AD
CNV
ACQ
SWC
changed by more than 1 LSB from the last sampled voltage. The source impedance (R
is 50Ω. See Section 18.0 for more information on acquisition time consideration.
A/D clock period
Conversion time
(not including acquisition time) (Note 1)
Acquisition time (Note 2)
Switching Time from convert → sample
Characteristic
PIC18FXXXX
PIC18LFXXXX
Preliminary
CY
cycle.
Min
1.6
2.0
10
11
—
5
(Note 3)
20
Max
6.0
12
—
—
(4)
Units
T
µs
µs
µs
µs
AD
2002 Microchip Technology Inc.
T
A/D RC mode
V
V
OSC
REF
REF
AD
clock divider.
= V
= V
S
based
) on the input channels
Conditions
DD
DD
= 5.0V
= 2.5V
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