PIC16F77T-E/ML Microchip Technology, PIC16F77T-E/ML Datasheet - Page 592
![IC MCU FLASH 8KX14 A/D 44QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC16F77T-E/ML
Manufacturer Part Number
PIC16F77T-E/ML
Description
IC MCU FLASH 8KX14 A/D 44QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F73-ISP.pdf
(174 pages)
5.PIC16F73-ISP.pdf
(14 pages)
6.PIC16F73-ISP.pdf
(12 pages)
Specifications of PIC16F77T-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
33
Number Of Timers
3 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F73-ISP PDF datasheet #4
- PIC16F73-ISP PDF datasheet #5
- PIC16F73-ISP PDF datasheet #6
- Current page: 592 of 688
- Download datasheet (3Mb)
PICmicro MID-RANGE MCU FAMILY
30.18
DS31030A-page 30-22
Param.
No.
62
63
64
65
66
† Data in “Typ” column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not
§
RD7:RD0
tested.
This specification ensured by design.
RE1/WR
RE0/RD
RE2/CS
Note: Refer to
TdtV2wrH
TwrH2dtI
TrdL2dtV
TrdH2dtI
TibfINH
Symbol
Example Parallel Slave Port (PSP) Timing Waveforms and Requirements
Figure 30-1
Data in valid before WR or CS
(setup time)
WR or CS to data–in invalid
(hold time)
RD and CS to data–out valid
RD or CS to data–out invalid
Inhibit of the IBF flag bit being cleared from
WR or CS
Figure 30-8:
Table 30-20:
for load conditions.
64
Example Parallel Slave Port Requirements
Characteristic
Example Parallel Slave Port Timing Waveforms
65
PIC16CXXX
PIC16LCXXX
Min
20
20
35
—
10
—
Typ†
—
—
—
—
—
—
62
3Tcy
1997 Microchip Technology Inc.
Max
63
80
30
—
—
—
§
Units Conditions
ns
ns
ns
ns
ns
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