PIC16F77T-E/ML Microchip Technology, PIC16F77T-E/ML Datasheet - Page 196
![IC MCU FLASH 8KX14 A/D 44QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC16F77T-E/ML
Manufacturer Part Number
PIC16F77T-E/ML
Description
IC MCU FLASH 8KX14 A/D 44QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F73-ISP.pdf
(174 pages)
5.PIC16F73-ISP.pdf
(14 pages)
6.PIC16F73-ISP.pdf
(12 pages)
Specifications of PIC16F77T-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
33
Number Of Timers
3 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F73-ISP PDF datasheet #4
- PIC16F73-ISP PDF datasheet #5
- PIC16F73-ISP PDF datasheet #6
- Current page: 196 of 688
- Download datasheet (3Mb)
PICmicro MID-RANGE MCU FAMILY
13.1
DS31013A-page 13-2
Introduction
Timer2 is an 8-bit timer with a prescaler, a postscaler, and a period register. Using the prescaler
and postscaler at their maximum settings, the overflow time is the same as a 16-bit timer.
Timer2 is the PWM time-base when the CCP module(s) is used in the PWM mode.
Figure 13-1
the TMR2 register matched the PR2 register. This can be useful in reducing the overhead of the
interrupt service routine on the CPU performance.
Figure 13-1: Timer2 Block Diagram
Note:
F
OSC
shows a block diagram of Timer2. The postscaler counts the number of times that
TMR2 register output can be software selected by the SSP Module as a baud clock.
/4
T2CKPS1:T2CKPS0
1:1, 1:4, 1:16
Prescaler
2
Comparator
TMR2 reg
PR2 reg
EQ
Reset
TOUTPS3:TOUTPS0
TMR2
output
1:1
Postscaler
to
(1)
1997 Microchip Technology Inc.
1:16
4
Sets flag
bit TMR2IF
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