ATMEGA32L-8MI Atmel, ATMEGA32L-8MI Datasheet - Page 11
![IC AVR MCU 32K LV 8MHZ IND 44QFN](/photos/12/13/121316/313-44-qfn_sml.jpg)
ATMEGA32L-8MI
Manufacturer Part Number
ATMEGA32L-8MI
Description
IC AVR MCU 32K LV 8MHZ IND 44QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA32L-8MI
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN Exposed Pad
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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General Purpose
Register File
2503Q–AVR–02/11
• Bit 0 – C: Carry Flag
The Carry Flag C indicates a carry in an arithmetic or logic operation. See the “Instruction Set
Description” for detailed information.
The Register File is optimized for the Atmel
achieve the required performance and flexibility, the following input/output schemes are sup-
ported by the Register File:
•
•
•
•
Figure 4
Figure 4. AVR CPU General Purpose Working Registers
Most of the instructions operating on the Register File have direct access to all registers, and
most of them are single cycle instructions.
As shown in
directly into the first 32 locations of the user Data Space. Although not being physically imple-
mented as SRAM locations, this memory organization provides great flexibility in access of the
registers, as the X-, Y-, and Z-pointer Registers can be set to index any register in the file.
One 8-bit output operand and one 8-bit result input
Two 8-bit output operands and one 8-bit result input
Two 8-bit output operands and one 16-bit result input
One 16-bit output operand and one 16-bit result input
shows the structure of the 32 general purpose working registers in the CPU.
Registers
Purpose
Working
General
Figure
4, each register is also assigned a data memory address, mapping them
7
R13
R14
R15
R16
R17
R26
R27
R28
R29
R30
R31
R0
R1
R2
…
…
®
0
AVR
®
Enhanced RISC instruction set. In order to
Addr.
$0D
$0E
$0F
$1A
$1B
$1C
$1D
$1E
$1F
$00
$01
$02
$10
$11
X-register High Byte
Y-register High Byte
Z-register High Byte
X-register Low Byte
Y-register Low Byte
Z-register Low Byte
ATmega32(L)
11
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