ATMEGA161-8AI Atmel, ATMEGA161-8AI Datasheet - Page 60

• Manufacturer Part Number: ATMEGA161-8AI
• Description: IC AVR MCU 16K 8MHZ IND 44-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA161-8AI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -
• Other names: ATMEGA1618AI

EEPROM Read/Write
Access
EEPROM Address Register –
EEARH and EEARL
EEPROM Data Register –
EEDR
60
ATmega161(L)
The EEPROM Access Registers are accessible in the I/O space.
The write access time is in the range of 1.9 - 3.4 ms, depending on the frequency of the
RC Oscillator used to time the EEPROM access time. See Table 22 for details. A self-
timing function, however, lets the user software detect when the next byte can be writ-
ten. If the user code contains code that writes the EEPROM, some precaution must be
taken. In heavily filtered power supplies, V
up/down. This causes the device for some period of time to run at a voltage lower than
specified as minimum for the clock frequency used. CPU operation under these condi-
tions is likely cause the Program Counter to perform unintentional jumps and eventually
execute the EEPROM write code. To secure EEPROM integrity, the user is advised to
use an external Under-voltage Reset circuit in this case.
In order to prevent unintentional EEPROM writes, a specific write procedure must be fol-
lowed. Refer to the description of the EEPROM Control Register for details on this.
When the EEPROM is written, the CPU is halted for two clock cycles before the next
instruction is executed. When the EEPROM is read, the CPU is halted for four clock
cycles before the next instruction is executed.
• Bits 15..9
These bits are reserved bits in the ATmega161 and will always read as zero.
• Bits 8..0
The EEPROM Address Registers (EEARH and EEARL) specify the EEPROM address
in the 512-byte EEPROM space. The EEPROM data bytes are addressed linearly
between 0 and 511. The initial value of EEAR is undefined. A proper value must be writ-
ten before the EEPROM may be accessed.
• Bits 7..0
For the EEPROM write operation, the EEDR Register contains the data to be written to
the EEPROM in the address given by the EEAR Register. For the EEPROM read oper-
ation, the EEDR contains the data read out from the EEPROM at the address given by
EEAR.
Bit
$1F ($3F)
$1E ($3E)
Read/Write
Initial Value
Bit
$1D ($3D)
Read/Write
Initial Value
–
–
EEAR7
–
EEAR8..0: EEPROM Address
EEDR7..0: EEPROM Data
MSB
R/W
R/W
15
Res: Reserved Bits
R
–
7
0
X
7
0
EEAR6
R/W
R/W
14
R
–
6
0
X
6
0
EEAR5
R/W
R/W
13
R
–
5
0
X
5
0
EEAR4
R/W
R/W
12
R
X
–
4
0
4
0
CC
EEAR3
is likely to rise or fall slowly on power-
R/W
R/W
11
R
X
–
3
0
3
0
EEAR2
R/W
R/W
10
R
X
–
2
0
2
0
EEAR1
R/W
R/W
R
X
9
–
1
0
1
0
EEAR8
EEAR0
LSB
R/W
R/W
R/W
1228D–AVR–02/07
X
X
8
0
0
0
EEARH
EEARL
EEDR