AT89S53-24JC Atmel, AT89S53-24JC Datasheet - Page 21
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AT89S53-24JC
Manufacturer Part Number
AT89S53-24JC
Description
IC MICRO CTRL 24MHZ 44PLCC
Manufacturer
Atmel
Series
89Sr
Datasheet
1.AT89S53-24JI.pdf
(35 pages)
Specifications of AT89S53-24JC
Core Processor
8051
Core Size
8-Bit
Speed
24MHz
Connectivity
SPI, UART/USART
Peripherals
WDT
Number Of I /o
32
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-PLCC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI, UART
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
32
Number Of Timers
3 x 16 bit
Operating Supply Voltage
4 V to 6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT89S53-24JC
Manufacturer:
VISHAY
Quantity:
13 000
Company:
Part Number:
AT89S53-24JC
Manufacturer:
ATM
Quantity:
670
Company:
Part Number:
AT89S53-24JC
Manufacturer:
ATM
Quantity:
670
Part Number:
AT89S53-24JC
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Instruction Set
Notes:
.
Flash Parallel Programming Modes
Notes:
0787E–MICRO–3/06
Instruction
Programming Enable
Chip Erase
Read Code Memory
Write Code Memory
Write Lock Bits
Mode
Serial Prog. Modes
Chip Erase
Write (12K bytes) Memory
Read (12K bytes) Memory
Write Lock Bits:
Read Lock Bits:
Read Atmel Code
Read Device Code
Serial Prog. Enable
Serial Prog. Disable
Read Serial Prog. Fuse
1. DATA polling is used to indicate the end of a write cycle which typically takes less than 10 ms at 2.7V.
2. “x” = don’t care.
1. “h” = weakly pulled “High” internally.
2. Chip Erase and Serial Programming Fuse require a 10 ms PROG pulse. Chip Erase needs to be performed first before
3. P3.4 is pulled Low during programming to indicate RDY/BSY.
4. “X” = don’t care
reprogramming any byte with a content other than FFH.
1010 1100
1010 1100
1010 1100
Bit - 1
Bit - 2
Bit - 3
Bit - 1
Bit - 2
Bit - 3
Byte 1
RST
10
01
H
H
H
H
H
H
H
H
H
H
H
Input Format
0101 0011
xxxx x100
low addr
low addr
PSEN
Byte 2
h
L
L
L
L
L
L
L
L
L
L
(1)
x x111
ALE/PROG
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
h
H
H
H
H
H
data in
Byte 3
(1)
(2)
(2)
(2)
EA/V
12V
12V
12V
12V
12V
12V
12V
12V
12V
12V
Operation
Enable serial programming interface after RST goes
high.
address. The 6 MSBs of the first byte are the high order
address bits. The low order address bits are in the
second byte. Data are available at pin MISO during the
third byte.
address. The address bits are the 6 MSBs of the first
byte together with the second byte.
Set LB1, LB2 or LB3 = “0” to program lock bits.
Chip erase the 12K memory array.
Read data from Code memory array at the selected
Write data to Code memory location at selected
Write lock bits.
x
PP
P2.6
H
H
H
H
L
L
L
L
L
L
P2.7
H
H
H
H
H
L
L
L
L
L
P3.6
H
H
H
L
L
L
L
L
L
L
P3.7
H
H
H
H
H
L
L
L
L
L
Data I/O
P0.7 = 0
P0.6 = 0
P0.5 = 0
P0.0 = 0
P0.0 = 1
P0.7:0
@P0.2
@P0.1
@P0.0
@P0.0
DOUT
DOUT
DOUT
DOUT
DIN
DIN
X
AT89S53
P2.5:0 P1.7:0
Address
ADDR
ADDR
30H
31H
X
X
X
X
X
X
X
X
X
X
X
X
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