AT90S4433-8PI Atmel, AT90S4433-8PI Datasheet - Page 66
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AT90S4433-8PI
Manufacturer Part Number
AT90S4433-8PI
Description
IC MCU 4K FLSH 8MHZ A/D IT 28DIP
Manufacturer
Atmel
Series
AVR® 90Sr
Datasheet
1.AT90S4433-8AC.pdf
(126 pages)
Specifications of AT90S4433-8PI
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 6x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90S4433-8PI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Table 21. ADC Conversion Time
66
Condition
1st Conversion, Free Run
1st Conversion, Single
Free Run Conversion
Single Conversion
AT90S/LS4433
Sample Cycle
Number
13.5
13.5
1.5
1.5
keeps running for as long as the ADEN bit is set and is continuously reset when ADEN
is low.
When initiating a conversion by setting the ADSC bit in ADCSR, the conversion starts at
the following rising edge of the ADC clock cycle. The actual sample-and-hold takes
place 1.5 ADC clock cycles after the start of the conversion. The result is ready and writ-
ten to the ADC Result Register after 13 cycles. In Single Conversion mode, the ADC
needs one more clock cycle before a new conversion can be started (see Figure 47). If
ADSC is set high in this period, the ADC will start the new conversion immediately. In
Free Run mode, a new conversion will be started immediately after the result is written
to the ADC Result Register. Using Free Run mode and an ADC clock frequency of 200
kHz gives the lowest conversion time, 65 µs, equivalent to 15.4 kSPS. For a summary of
conversion times, see Table 21.
Figure 46. ADC Timing Diagram, First Conversion (Single Conversion Mode)
Cycle Number
ADC Clock
ADEN
ADSC
Hold Strobe
ADIF
ADCH
ADCL
Ready(Cycle Number)
1
2
Dummy Conversion
Result
25
25
13
13
12
13
14
15
16
Total Conversion
17
Time (Cycles)
18
Actual Conversion
25
26
13
14
19
20
21
22
23
Total Conversion
24
Time (µs)
125 - 500
130 - 520
65 - 260
70 - 280
25
1042H–AVR–04/03
26
MSB of Result
LSB of Result
Second
Conversion
1
2