SAF-C167CS-L16M 3V CA+ Infineon Technologies, SAF-C167CS-L16M 3V CA+ Datasheet - Page 65

• Manufacturer Part Number: SAF-C167CS-L16M 3V CA+
• Description: IC MCU 16BIT ROM/LESS MQFP-144
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C167CS-L16M 3V CA+

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: CAN, EBI/EMI, SPI, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Type: ROMless
• Ram Size: 11K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144- BSQFP
• Data Bus Width: 16 bit
• Data Ram Size: 11 KB
• Interface Type: ASC, CAN, SSC
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Packages: PG-MQFP-144
• Max Clock Frequency: 16.0 MHz
• Sram (incl. Cache): 11.0 KByte
• Can Nodes: 2
• A / D Input Lines (incl. Fadc): 24
• Program Memory: 0.0 KByte
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: F167CSL16M3VCAZNT; F167CSL16M3VCAZXT; SAFC167CSL16M3VCAT; SP000017109; SP000103470

6)
7)
Sample time and conversion time of the C167CS-3V’s A/D Converter are programmable.
Table 14
The limit values for
Table 14
ADCON.15|14
(ADCTC)
00
01
10
11
Converter Timing Example:
Assumptions:
Basic clock
Sample time
Conversion time
Data Sheet
Not 100% tested, guaranteed by design and characterization.
During the sample time the input capacitance
internal resistance of the analog source must allow the capacitance to reach its final voltage level within
After the end of the sample time
Values for the sample time
should be used to calculate the above timings.
A/D Converter Computation Table
A/D Converter
Basic Clock
f
f
f
f
CPU
CPU
CPU
CPU
f
f
t
t
f
CPU
BC
S
C
BC
/ 4
/ 2
/ 16
/ 8
must not be exceeded when selecting ADCTC.
t
S
depend on programming and can be taken from
= 12.5 MHz (i.e.
=
=
=
t
S
f
t
t
, changes of the analog input voltage have no effect on the conversion result.
CPU
BC
S
f
+ 40
BC
/ 2 = 6.25 MHz, i.e.
8 = 1280 ns.
t
BC
C
+ 2
AIN
61
t
can be charged/discharged by the external source. The
CPU
t
ADCON.13|12
(ADSTC)
00
01
10
11
CPU
= 80 ns), ADCTC = ‘01’, ADSTC = ‘00’.
= (1280 + 6400 + 160) ns = 7.8 s.
t
BC
= 160 ns.
Sample time
t
t
t
t
t
S
BC
BC
BC
BC
Table
8
16
32
64
C167CS-L16M3V
14.
Low Power
V1.0, 2001-10
t
S
.