SAK-XC2785X-104F80L AA Infineon Technologies, SAK-XC2785X-104F80L AA Datasheet - Page 123

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SAK-XC2785X-104F80L AA

Manufacturer Part Number
SAK-XC2785X-104F80L AA
Description
IC MCU 32BIT FLASH 144-LQFP
Manufacturer
Infineon Technologies
Series
XC27x5Xr
Datasheet

Specifications of SAK-XC2785X-104F80L AA

Core Processor
C166SV2
Core Size
16/32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
Peripherals
I²S, POR, PWM, WDT
Number Of I /o
116
Program Memory Size
832KB (832K x 8)
Program Memory Type
FLASH
Ram Size
50K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LFQFP
Data Bus Width
16 bit, 32 bit
Data Ram Size
32 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
119
Number Of Timers
5
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 24 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
SP000439080
Figure 26
Notes
1. This is the last chance for BREQ to trigger the indicated regain sequence.
2. The control outputs will be resistive high (pull-up) before being driven inactive (ALE
3. The next XC2785X-driven bus cycle may start here.
Data Sheet
Even if BREQ is activated earlier, the regain sequence is initiated by HOLD going
high. Please note that HOLD may also be deactivated without the XC2785X
requesting the bus.
will be low).
CLKOUT
HOLD
HLDA
BREQ
CSx, RD,
WR(L/H)
Addr, Data,
BHE
External Bus Arbitration, Regaining the Bus
t
40
XC2000 Family Derivatives / Base Line
123
t
10
1)
/
t
14
2)
t
t
t
41
41
11
/
t
12
3)
/
t
Electrical Parameters
13
/
t
MC_X_EBCARBREG
15
/
t
16
V2.0, 2009-03
XC2785X

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