SAK-XC2365A-104F80L AA Infineon Technologies, SAK-XC2365A-104F80L AA Datasheet - Page 32

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SAK-XC2365A-104F80L AA

Manufacturer Part Number
SAK-XC2365A-104F80L AA
Description
IC MCU 32BIT FLASH 100-LQFP
Manufacturer
Infineon Technologies
Series
XC23xxAr
Datasheet

Specifications of SAK-XC2365A-104F80L AA

Core Processor
C166SV2
Core Size
16/32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
Peripherals
I²S, POR, PWM, WDT
Number Of I /o
75
Program Memory Size
832KB (832K x 8)
Program Memory Type
FLASH
Ram Size
50K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
SP000448776
Table 5
Pin
91
92
93
94
95
96
Data Sheet
Symbol
P10.15
U1C0_SELO
2
U0C1_DOUT O2
U1C0_DOUT O3
ALE
U0C1_DX1C
P1.5
U1C1_SELO
3
BRKOUT
A13
U2C0_DX0C
P1.6
U1C1_SELO
2
U2C0_DOUT O3
A14
U2C0_DX0D
P1.7
U1C1_MCLK
OUT
U2C0_SCLK
OUT
A15
U2C0_DX1C
XTAL2
XTAL1
ESR2_9
Pin Definitions and Functions (cont’d)
Ctrl.
O0 / I St/B
O1
OH
I
O0 / I St/B
O2
O3
OH
I
O0 / I St/B
O2
OH
I
O0 / I St/B
O2
O3
OH
I
O
I
I
Type Function
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
Sp/M Crystal Oscillator Amplifier Output
Sp/M Crystal Oscillator Amplifier Input
St/B
Bit 15 of Port 10, General Purpose Input/Output
USIC1 Channel 0 Select/Control 2 Output
USIC0 Channel 1 Shift Data Output
USIC1 Channel 0 Shift Data Output
External Bus Interf. Addr. Latch Enable Output
USIC0 Channel 1 Shift Clock Input
Bit 5 of Port 1, General Purpose Input/Output
USIC1 Channel 1 Select/Control 3 Output
OCDS Break Signal Output
External Bus Interface Address Line 13
USIC2 Channel 0 Shift Data Input
Bit 6 of Port 1, General Purpose Input/Output
USIC1 Channel 1 Select/Control 2 Output
USIC2 Channel 0 Shift Data Output
External Bus Interface Address Line 14
USIC2 Channel 0 Shift Data Input
Bit 7 of Port 1, General Purpose Input/Output
USIC1 Channel 1 Master Clock Output
USIC2 Channel 0 Shift Clock Output
External Bus Interface Address Line 15
USIC2 Channel 0 Shift Clock Input
To clock the device from an external source, drive
XTAL1, while leaving XTAL2 unconnected.
Voltages on XTAL1 must comply to the core
supply voltage
ESR2 Trigger Input 9
XC2361A, XC2363A, XC2364A, XC2365A
XC2000 Family Derivatives / Base Line
32
V
DDIM
.
General Device Information
V2.0, 2009-03

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