SAK-XC2764X-40F80L AA Infineon Technologies, SAK-XC2764X-40F80L AA Datasheet - Page 31

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SAK-XC2764X-40F80L AA

Manufacturer Part Number
SAK-XC2764X-40F80L AA
Description
IC MCU 16BIT FLASH 100-LQFP
Manufacturer
Infineon Technologies
Series
XC27x4Xr
Datasheet

Specifications of SAK-XC2764X-40F80L AA

Core Processor
C166SV2
Core Size
16/32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
Peripherals
I²S, POR, PWM, WDT
Number Of I /o
76
Program Memory Size
320KB (320K x 8)
Program Memory Type
FLASH
Ram Size
34K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LSQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
SP000627028
Table 5
Pin
84
85
86
87
Data Sheet
Symbol
P1.2
U1C0_SELO
6
A10
ESR1_4
CCU61_T12
HRB
P10.12
U1C0_DOUT O1
TDO_B
AD12
U1C0_DX0C
U1C0_DX1E
P10.13
U1C0_DOUT O1
U1C0_SELO
3
WR/WRL
U1C0_DX0D
P1.3
U1C0_SELO
7
A11
ESR2_4
Pin Definitions and Functions (cont’d)
Ctrl.
O0 / I St/B
O2
OH
I
I
O0 / I St/B
OH /
IH
OH /
IH
I
I
O0 / I St/B
O3
OH
I
O0 / I St/B
O2
OH
I
Type Function
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
Bit 2 of Port 1, General Purpose Input/Output
USIC1 Channel 0 Select/Control 6 Output
External Bus Interface Address Line 10
ESR1 Trigger Input 4
External Run Control Input for T12 of CCU61
Bit 12 of Port 10, General Purpose Input/Output
USIC1 Channel 0 Shift Data Output
JTAG Test Data Output / DAP1 Input/Output
If DAP pos. 1 is selected during start-up, an
internal pull-down device will hold this pin low
when nothing is driving it.
External Bus Interface Address/Data Line 12
USIC1 Channel 0 Shift Data Input
USIC1 Channel 0 Shift Clock Input
Bit 13 of Port 10, General Purpose Input/Output
USIC1 Channel 0 Shift Data Output
USIC1 Channel 0 Select/Control 3 Output
External Bus Interface Write Strobe Output
Active for each external write access, when WR,
active for ext. writes to the low byte, when WRL.
USIC1 Channel 0 Shift Data Input
Bit 3 of Port 1, General Purpose Input/Output
USIC1 Channel 0 Select/Control 7 Output
External Bus Interface Address Line 11
ESR2 Trigger Input 4
31
XC2000 Family / Value Line
General Device Information
V1.2, 2010-04
XC2764X

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