SAK-XC2336B-40F80L AA Infineon Technologies, SAK-XC2336B-40F80L AA Datasheet - Page 37

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SAK-XC2336B-40F80L AA

Manufacturer Part Number
SAK-XC2336B-40F80L AA
Description
IC MCU 16BIT 320KB FLASH 64LQFP
Manufacturer
Infineon Technologies
Series
XC23xxBr
Datasheet

Specifications of SAK-XC2336B-40F80L AA

Core Processor
C166SV2
Core Size
16/32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
Peripherals
I²S, POR, PWM, WDT
Number Of I /o
38
Program Memory Size
320KB (320K x 8)
Program Memory Type
FLASH
Ram Size
34K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
3.7
The CAPCOM unit supports generation and control of timing sequences on up to
16 channels with a maximum resolution of one system clock cycle (eight cycles in
staggered mode). The CAPCOM unit is typically used to handle high-speed I/O tasks
such as pulse and waveform generation, pulse width modulation (PWM), digital to
analog (D/A) conversion, software timing, or time recording with respect to external
events.
Two 16-bit timers with reload registers provide two independent time bases for the
capture/compare register array.
The input clock for the timers is programmable to several prescaled values of the internal
system clock, or may be derived from an overflow/underflow of timer T6 in module GPT2.
This provides a wide range of variation for the timer period and resolution and allows
precise adjustments to the application specific requirements. In addition, external count
inputs allow event scheduling for the capture/compare registers relative to external
events.
The capture/compare register array contains 16 dual purpose capture/compare
registers, each of which may be individually allocated to either CAPCOM timer and
programmed for capture or compare function.
All registers have each one port pin associated with it which serves as an input pin for
triggering the capture function, or as an output pin to indicate the occurrence of a
compare event.
When a capture/compare register has been selected for capture mode, the current
contents of the allocated timer will be latched (‘captured’) into the capture/compare
register in response to an external event at the port pin which is associated with this
register. In addition, a specific interrupt request for this capture/compare register is
generated. Either a positive, a negative, or both a positive and a negative external signal
transition at the pin can be selected as the triggering event.
The contents of all registers which have been selected for one of the five compare modes
are continuously compared with the contents of the allocated timers.
When a match occurs between the timer value and the value in a capture/compare
register, specific actions will be taken based on the selected compare mode.
Table 9
Compare Modes
Mode 0
Mode 1
Data Sheet
Capture/Compare Unit (CC2)
Compare Modes
Function
Interrupt-only compare mode;
Several compare interrupts per timer period are possible
Pin toggles on each compare match;
Several compare events per timer period are possible
37
XC2000 Family / Value Line
Functional Description
V1.2, 2010-04
XC2336B

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