SAF-XC878-13FFI 3V3 AA Infineon Technologies, SAF-XC878-13FFI 3V3 AA Datasheet - Page 105

• Manufacturer Part Number: SAF-XC878-13FFI 3V3 AA
• Description: IC MCU 8BIT FLASH 64-LQFP
• Manufacturer: Infineon Technologies
• Series: XC8xxr

Specifications of SAF-XC878-13FFI 3V3 AA

• Core Processor: XC800
• Core Size: 8-Bit
• Speed: 27MHz
• Connectivity: SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 40
• Program Memory Size: 52KB (52K x 8)
• Program Memory Type: FLASH
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: SP000447276

3.19
The T2CCU (Timer 2 Capture/Compare Unit) consists of the standard Timer 2 unit and
a Capture/compare unit (CCU). The Capture/Compare Timer (CCT) is part of the CCU.
Control is available in the T2CCU to select individually for each of its 16-bit
capture/compare channel, either the Timer 2 or the Capture/Compare Timer (CCT) as
the time base. Both timers have a resolution of 16 bits.The clock frequency of T2CCU,
f
The T2CCU can be used for various digital signal generation and event capturing like
pulse generation, pulse width modulation, pulse width measuring etc. Target
applications include various automotive control as well as industrial (frequency
generation, digital-to-analog conversion, process control etc.).
T2CCU Features
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Data Sheet
T2CCU
Option to select individually for each channel, either Timer 2 or Capture/Compare
Timer as time base
Extremely flexible Capture/Compare Timer count rate by cascading with Timer 2
Capture/Compare Timer may be ‘reset’ immediately by triggering overflow event
16-bit resolution
Six compare channels in total
Four capture channels multiplexed with the compare channels, in total
Shadow register for each compare register
– Transfer via software control or on timer overflow.
Compare Mode 0: Compare output signal changes from the inactive level to active
level on compare match. Returns to inactive level on timer overflow.
– Active level can be defined by register bit for channel groups A and B.
– Support of 0% to 100% duty cycle in compare mode 0.
Compare Mode 1: Full control of the software on the compare output signal level, for
the next compare match.
Concurrent Compare Mode with channel 0
Capture Mode 0: Capture on any external event (rising/falling/both edge) at the 4 pins
T2CC0 to T2CC3.
Capture Mode 1: Capture upon writing to the low byte of the corresponding channel
capture register.
Capture mode 0 or 1 can be established independently on the 4 capture channels.
, could be set at PCLK frequency or 2 times the PCLK frequency.
Timer 2 Capture/Compare Unit
98
Functional Description
XC87xCLM
V1.5, 2011-03