SAF-XC866-4FRA BE Infineon Technologies, SAF-XC866-4FRA BE Datasheet - Page 21

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SAF-XC866-4FRA BE

Manufacturer Part Number
SAF-XC866-4FRA BE
Description
IC MCU 8BIT 12KB FLASH 38TSSOP
Manufacturer
Infineon Technologies
Series
XC8xxr
Datasheet

Specifications of SAF-XC866-4FRA BE

Core Processor
XC800
Core Size
8-Bit
Speed
86MHz
Connectivity
SSI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
38-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
3.2.1
The XC866 memory protection strategy includes:
• Read-out protection: The Flash Memory can be enabled for read-out protection and
• Program and erase protection: The Flash memory in all devices can be enabled for
Flash memory protection is available in two modes:
• Mode 0: Only the P-Flash is protected; the D-Flash is unprotected
• Mode 1: Both the P-Flash and D-Flash are protected
The selection of each protection mode and the restrictions imposed are summarized in
Table
Table 4
BSL mode 6, which is used for enabling Flash protection, can also be used for disabling
Flash protection. Here, the programmed password must be provided by the user. A
password match triggers an automatic erase of the read-protected Flash contents, see
Table 5
then disabled upon the next reset.
For XC866-2FR and XC866-4FR devices:
The selection of protection type is summarized in
Data Sheet
Mode
Activation
Selection
P-Flash contents
can be read by
P-Flash program
and erase
D-Flash contents
can be read by
D-Flash program Possible
D-Flash erase
ROM memory is always protected.
program and erase protection.
4.
and
Memory Protection Strategy
Table
Flash Protection Modes
6, and the programmed password is erased. The Flash protection is
0
Program a valid password via BSL mode 6
MSB of password = 0
Read instructions in the
P-Flash
Not possible
Read instructions in any program
memory
Possible, on the condition that bit
DFLASHEN in register MISC_CON
is set to 1 prior to each erase
operation
17
Table
5.
1
MSB of password = 1
Read instructions in the
P-Flash or D-Flash
Not possible
Read instructions in the
P-Flash or D-Flash
Not possible
Not possible
Functional Description
V1.2, 2007-10
XC866

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