MAXQ610A-0000+ Maxim Integrated Products, MAXQ610A-0000+ Datasheet - Page 17
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MAXQ610A-0000+
Manufacturer Part Number
MAXQ610A-0000+
Description
IC MCU 16BIT 64K IR MOD 32TQFN
Manufacturer
Maxim Integrated Products
Series
MAXQ™r
Datasheets
1.MAXQ610A-0000.pdf
(28 pages)
2.MAXQ610A-0000.pdf
(29 pages)
3.MAXQ610A-0000.pdf
(23 pages)
Specifications of MAXQ610A-0000+
Core Processor
RISC
Core Size
16-Bit
Speed
12MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Infrared, Power-Fail, POR, WDT
Number Of I /o
20
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
32-TQFN Exposed Pad
Processor Series
MAXQ610
Core
RISC
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
SPI, USART
Maximum Clock Frequency
12 MHz
Number Of Timers
4
Operating Supply Voltage
1.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Controller Family/series
MAXQ
No. Of I/o's
24
Ram Memory Size
2048Byte
Cpu Speed
12MHz
No. Of Timers
2
Embedded Interface Type
JTAG, SPI, USART
Rohs Compliant
Yes
Number Of Programmable I/os
32
Development Tools By Supplier
MAXQ610-KIT
Package
32TQFN EP
Family Name
MAXQ
Maximum Speed
12 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
90-M6800+B01
the V
However, in the event that V
level, a POR is generated. The power-fail monitor is
enabled prior to stop mode exit and before code exe-
cution begins. If a power-fail warning condition (V
V
set on stop mode exit. If a power-fail condition is
detected (V
Figures 8, 9, and 10 show the power-fail detection and
response during normal and stop mode operation.
If a reset is caused by a power-fail, the power-fail moni-
tor can be set to one of the following intervals:
• Always on—continuous monitoring
• 2
Figure 8. Power-Fail Detection During Normal Operation
PFW
11
DD
) is then detected, the power-fail interrupt flag is
nanopower ring oscillator clocks (~256ms)
INTERNAL RESET
(ACTIVE HIGH)
< V
V
V
V
PFW
POR
RST
16-Bit Microcontroller with Infrared Module
DD
RST
< V
condition does not invoke a reset state.
V
DD
______________________________________________________________________________________
RST
A
), the CPU goes into reset.
B
C
Power-Fail Detection
DD
falls below the POR
t < t
D
PFW
t ≥ t
PFW
DD
E
<
• 2
• 2
In the case where the power-fail circuitry is periodically
turned on, the power-fail detection is turned on for two
nanopower ring oscillator cycles. If V
detection, V
er ring oscillator period. If V
the third nanopower ring period, the CPU exits the reset
state and resumes normal operation from utility ROM at
8000h after satisfying the crystal warmup period.
If a reset is generated by any other event, such as the
RESET pin being driven low externally or the watchdog
timer, the power-fail, internal regulator, and crystal
remain on during the CPU reset. In these cases, the
CPU exits the reset state in less than 20 external clock
cycles after the reset source is removed.
12
13
t ≥ t
nanopower ring oscillator clocks (~512ms)
nanopower ring oscillator clocks (~1.024s)
PFW
F
DD
is monitored for an additional nanopow-
G
DD
t ≥ t
remains above V
PFW
DD
H
> V
RST
I
RST
during
17
for