MAXQ610A-0000+ Maxim Integrated Products, MAXQ610A-0000+ Datasheet - Page 11

• Manufacturer Part Number: MAXQ610A-0000+
• Description: IC MCU 16BIT 64K IR MOD 32TQFN
• Manufacturer: Maxim Integrated Products
• Series: MAXQ™r

Specifications of MAXQ610A-0000+

• Core Processor: RISC
• Core Size: 16-Bit
• Speed: 12MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Infrared, Power-Fail, POR, WDT
• Number Of I /o: 20
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 32-TQFN Exposed Pad
• Processor Series: MAXQ610
• Core: RISC
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: SPI, USART
• Maximum Clock Frequency: 12 MHz
• Number Of Timers: 4
• Operating Supply Voltage: 1.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Controller Family/series: MAXQ
• No. Of I/o's: 24
• Ram Memory Size: 2048Byte
• Cpu Speed: 12MHz
• No. Of Timers: 2
• Embedded Interface Type: JTAG, SPI, USART
• Rohs Compliant: Yes
• Number Of Programmable I/os: 32
• Development Tools By Supplier: MAXQ610-KIT
• Package: 32TQFN EP
• Family Name: MAXQ
• Maximum Speed: 12 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 90-M6800+B01

carrier generation module uses the 16-bit IR Carrier
register (IRCA) to define the high and low time of the
carrier through the IR carrier high byte (IRCAH) and IR
carrier low byte (IRCAL). The carrier modulator uses the
IR data bit (IRDATA) and IR Modulator Time register
(IRMT) to determine whether the carrier or the idle con-
dition is present on IRTX.
The IR timer is enabled when the IR enable bit (IREN) is
set to 1. The IR Value register (IRV) defines the begin-
ning value for the carrier modulator. During transmis-
sion, the IRV register is initially loaded with the IRMT
value and begins down counting towards 0000h,
whereas in receive mode it counts upward from the ini-
tial IRV register value. During the receive operation, the
IRV register can be configured to reload with 0000h
when capture occurs on detection of selected edges or
can be allowed to continue free-running throughout the
receive operation. An overflow occurs when the IR timer
value rolls over from 0FFFFh to 0000h. The IR overflow
flag (IROV) is set to 1 and an interrupt is generated if
enabled (IRIE = 1).
The IRCAH byte defines the carrier high time in terms of
the number of IR input clocks, whereas the IRCAL byte
defines the carrier low time.
During transmission, the IRCA register is latched for
each IRV downcount interval and is sampled along with
the IRTXPOL and IRDATA bits at the beginning of each
new IRV downcount interval so that duty-cycle variation
and frequency shifting is possible from one interval to
the next, which is illustrated in Figure 1.
Figure 2 illustrates the basic carrier generation and its
path to the IRTX output pin. The IR transmit polarity bit
(IRTXPOL) defines the starting/idle state and the carrier
polarity of the IRTX pin when the IR timer is enabled.
Carrier Duty Cycle = (IRCAH + 1)/(IRCAH + IRCAL + 2)
IR Input Clock (f
16-Bit Microcontroller with Infrared Module
Carrier Frequency (f
Carrier High Time = IRCAH + 1
Carrier Low Time = IRCAL + 1
f
IRCLK
______________________________________________________________________________________
/(IRCAH + IRCAL + 2)
Carrier Generation Module
IRCLK
) = f
CARRIER
SYS
/2
IRDIV[1:0]
) =
During IR transmission (IRMODE = 1), the carrier gener-
ator creates the appropriate carrier waveform, while the
carrier modulator performs the modulation. The carrier
modulation can be performed as a function of carrier
cycles or IRCLK cycles dependent on the setting of the
IRCFME bit. When IRCFME = 0, the IRV downcounter is
clocked by the carrier frequency and thus the modula-
tion is a function of carrier cycles. When IRCFME = 1,
the IRV downcounter is clocked by IRCLK, allowing car-
rier modulation timing with IRCLK resolution.
The IRTXPOL bit defines the starting/idle state as well
as the carrier polarity for the IRTX pin. If IRTXPOL = 1,
the IRTX pin is set to a logic-high when the IR timer
module is enabled. If IRTXPOL = 0, the IRTX pin is set
to a logic-low when the IR timer is enabled.
A separate register bit, IR data (IRDATA), is used to
determine whether the carrier generator output is out-
put to the IRTX pin for the next IRMT carrier cycles.
When IRDATA = 1, the carrier waveform (or inversion of
this waveform if IRTXPOL = 1) is output on the IRTX pin
during the next IRMT cycles. When IRDATA = 0, the
idle condition, as defined by IRTXPOL, is output on the
IRTX pin during the next IRMT cycles.
The IR timer acts as a downcounter in transmit mode.
An IR transmission starts when 1) the IREN bit is set to
1 when IRMODE = 1, 2) the IRMODE bit is set to 1
when IREN = 1, or 3) when IREN and IRMODE are both
set to 1 in the same instruction. The IRMT and IRCA
registers, along with the IRDATA and IRTXPOL bits, are
sampled at the beginning of the transmit process and
every time the IR timer value reloads its value. When
the IRV reaches 0000h value, on the next carrier clock,
it does the following:
1) Reloads IRV with IRMT.
2) Samples IRCA, IRDATA, and IRTXPOL.
3) Generates IRTX accordingly.
4) Sets IRIF to 1.
5) Generates an interrupt to the CPU if enabled (IRIE = 1).
To terminate the current transmission, the user can
switch to receive mode (IRMODE = 0) or clear IREN to 0.
Carrier Modulation Time = IRMT + 1 carrier cycles
IR Transmission
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