M3087BFKAGP#U5 Renesas Electronics America, M3087BFKAGP#U5 Datasheet - Page 285
![IC M32C/87B MCU FLASH 144LQFP](/photos/12/43/124312/m3087bfkagp_u5_sml.jpg)
M3087BFKAGP#U5
Manufacturer Part Number
M3087BFKAGP#U5
Description
IC M32C/87B MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet
1.M3087BFLGPU3.pdf
(629 pages)
Specifications of M3087BFKAGP#U5
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
121
Program Memory Size
768KB (768K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Part Number:
M3087BFKAGP#U5M3087BFKAGP#U3
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
M3087BFKAGP#U5M3087BFKAGP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 261 of 587
Figure 17.30
Transmit/receive operation starts when a trigger is input to the
CTSi pin after writing data to the UiTB register.
Read the UiRB register when a receive operation is completed.
i = 0 to 4
NOTE:
1. The external clock synchronization function is determined by the combination of the SCLKDIV bit in the UiSMR register
UiMR register: bits SMD2 to SMD0 = 001b
UiSMR register: bits 6 to 0 = 0000000b
UiSMR2 register: bits 6 to 0 = 0000000b
UiSMR3 register = 00h
UiSMR4 register = 00h
UiC0 register: bits CLK1 and CLK0 = 00b
UiBRG register = 00h
UiC1 register: TE bit = 0
I flag = 0
SiTIC register: bits ILVL2 to ILVL0
SiRIC register: bits ILVL2 to ILVL0
I flag = 1
UiC1 register: TE bit = 1
and the SU1HIM bit in the UiSMR2 register. Refer to the table " Clock-Divided Synchronous Function Select " for
details.
Pin setting in the Function Select Registers
Register Settings in GCI Mode
CRD bit = 1
NCH bit
CKPOL bit = 0
UFORM bit = 0
RE bit = 0
UiIRS bit
UiRRM bit = 0
UiLCH bit = 0
SCLKSTPB bit = 0
CKDIR bit = 1
IOPOL bit = 0
RE bit = 1
SCLKDIV bit
IR bit = 0
IR bit = 0
Start initial setting
End initial setting
SU1HIM bit
Interrupt disabled
Clock synchronous mode
Select external clock
Clock division synchronous bit
External clock synchronous enable bit
CTS function disabled
Data output select bit
Transmit operation disabled
Receive operation disabled
UARTi transmit interrupt source select bit
Clock-divided synchronization stopped
Transmit interrupt priority level select bits
Interrupt not requested
Receive interrupt priority level select bits
Interrupt not requested
Interrupt enabled
Transmit operation enabled
Receive operation enabled
17. Serial Interfaces (UART0 to UART4)
(1)
(1)
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