M3087BFKAGP#U5 Renesas Electronics America, M3087BFKAGP#U5 Datasheet - Page 157
![IC M32C/87B MCU FLASH 144LQFP](/photos/12/43/124312/m3087bfkagp_u5_sml.jpg)
M3087BFKAGP#U5
Manufacturer Part Number
M3087BFKAGP#U5
Description
IC M32C/87B MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet
1.M3087BFLGPU3.pdf
(629 pages)
Specifications of M3087BFKAGP#U5
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
121
Program Memory Size
768KB (768K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Part Number:
M3087BFKAGP#U5M3087BFKAGP#U3
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
M3087BFKAGP#U5M3087BFKAGP#U3
Manufacturer:
Renesas Electronics America
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10 000
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M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 133 of 587
Figure 11.21
Example: Intelligent I/O Group 1 Waveform Generation Function 1 Interrupt, Group 2 Waveform Generation Function 3
NO
NO
NO
<Interrupt setting>
NOTES:
1. Do not change the interrupt enable bit (bits 1 to 7 in the IIOiIE register (i = 0 to 11)) and the IRLT bit in the IIOiIE register
2. If an interrupt request is generated while writing a 0 to the corresponding interrupt request flag, the flag may not be cleared to
3. Ensure that all the enabled interrupt request flags are set to 0. If any of these flags remains 1, the IR bit in the IIOiIC (CANkIC
IIO8IR register = 00h
IIO8IE register: IRLT bit = 1
IIO8IE register: PO11E bit = 1
IIO8IC register: bits ILVL2 to ILVL0
I flag = 1
IIO8IR register: PO11R bit = 0
IIO8IR register: PO23R bit = 0
simultaneously. Set the IRLT bit to 1 first, and then set the interrupt enable bit to 1.
0. In this case, keep writing a 0 until 0 is read.
(k = 0 to 5)) register does not become 1 when an interrupt request is generated in the same register. (Interrupt does not occur.)
Interrupt are used.
IIO8IR register: PO11R bit = 1 ?
IIO8IR register: PO23R bit = 1 ?
Interrupt Routine Example
Interrupt processing of PO11
Interrupt processing of PO23
IIO8IR register & 06h = 0 ?
Interrupt routine
PO23E bit = 1
bits 7 to 3 = 00000b
IR bit = 0
End
YES
YES
YES
Initialize the Interrupt Request Register
Uses an interrupt request for interrupts
Enable intelligent I/O group 1 waveform generation function 1 interrupt
Enable intelligent I/O group 2 waveform generation function 3 interrupt
Disable unused interrupts
Interrupt priority level select bits
Interrupt not requested
Interrupt enabled
Set to 0 (interrupt not requested) using AND or BCLR instruction
Set to 0 (interrupt not requested) using AND or BCLR instruction
(note 3)
(2)
(2)
(note 1)
11. Interrupts
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