M306N4FGTFP Renesas Electronics America, M306N4FGTFP Datasheet - Page 61
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M306N4FGTFP
Manufacturer Part Number
M306N4FGTFP
Description
IC M16C MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Datasheets
1.M30622SAFPU5.pdf
(308 pages)
2.M306N4FGGPU3.pdf
(94 pages)
3.M306N4FGGPU3.pdf
(414 pages)
Specifications of M306N4FGTFP
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M306N4FGTFP
Manufacturer:
TI
Quantity:
3 001
Company:
Part Number:
M306N4FGTFP
Manufacturer:
RENESAS
Quantity:
36
Company:
Part Number:
M306N4FGTFP
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
M306N4FGTFP
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Company:
Part Number:
M306N4FGTFP#UKJ
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
M306N4FGTFP#UKJ
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
M16C/6N Group (M16C/6N4)
Rev.2.40
REJ03B0003-0240
Under development
This document is under development and its contents are subject to change.
Timing Requirements
(Referenced to VCC = 5 V, VSS = 0 V, at Topr = –40 to 85°C unless otherwise specified)
Table 5.34 External Clock Input (XIN Input)
Table 5.35 Memory Expansion Mode and Microprocessor Mode
NOTES:
t
t
t
t
t
C
w(H)
w(L)
r
f
t
t
t
t
t
t
t
t
t
Symbol
ac1(RD-DB)
ac2(RD-DB)
ac3(RD-DB)
su(DB-RD)
su(RDY-BCLK)
su(HOLD-BCLK)
h(RD-DB)
h(BCLK-RDY)
h(BCLK-HOLD)
Symbol
1. Calculated according to the BCLK frequency as follows:
2. Calculated according to the BCLK frequency as follows:
3. Calculated according to the BCLK frequency as follows:
Aug 25, 2006
0.5 ✕ 10
f(BCLK)
(n –0.5) ✕ 10
(n –0.5) ✕ 10
f(BCLK)
f(BCLK)
External clock input cycle time
External clock input HIGH pulse width
External clock input LOW pulse width
External clock rise time
External clock fall time
Data input access time (for setting with no wait)
Data input access time (for setting with wait)
Data input access time (when accessing multiplexed bus area)
Data input setup time
________
RDY input setup time
__________
HOLD input setup time
Data input hold time
________
RDY input hold time
__________
HOLD input hold time
9
– 45 [ns]
page 59 of 88
9
9
– 45 [ns]
– 45 [ns]
n is “2” for 1-wait setting, “3” for 2-wait setting and “4” for 3-wait setting.
n is “2” for 2-wait setting, “3” for 3-wait setting.
Parameter
Parameter
5. Electric Characteristics (Normal-ver.)
62.5
Min.
Min.
25
25
40
30
40
0
0
0
Standard
Standard
(NOTE 1)
(NOTE 2)
(NOTE 3)
Max.
Max.
VCC = 5 V
15
15
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns