HD6473937W Renesas Electronics America, HD6473937W Datasheet - Page 381
HD6473937W
Manufacturer Part Number
HD6473937W
Description
MCU FLASH OTP 60K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300L SLPr
Datasheet
1.HD6473937RXV.pdf
(523 pages)
Specifications of HD6473937W
Core Processor
H8/300L
Core Size
8-Bit
Speed
10MHz
Connectivity
SCI
Peripherals
POR, WDT
Number Of I /o
59
Program Memory Size
60KB (60K x 8)
Program Memory Type
OTP
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Part Number:
HD6473937W
Manufacturer:
Renesas Electronics America
Quantity:
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Table 12-26 Roaming Status Packet Bit Assignments
Byte 3
Byte 2
Byte 1
Byte 0
RSR: Re-synchronization Signal Received. Set when the FLEX decoder detected a re-
synchronization signal and the host configured the FLEX decoder to ignore it via the IRS bit in the
roaming control packet. This bit is cleared when read.
MS1: Missed Synchronization 1. Set when the FLEX decoder failed to detect the first
synchronization pattern (A / A) of a FLEX frame and the FLEX decoder was configured to report
missed frame information via the MFC bit in the roaming control packet. This bit is cleared when
read.
MFI: Missed Frame Information word. Set when the frame information word is received with an
uncorrectable number of errors and the FLEX decoder was configured to report missed frame
information via the MFC bit in the roaming control packet. This bit is cleared when read.
MS2: Missed Synchronization 2. Set when the FLEX decoder failed to detect the second
synchronization pattern (C / C) of a frame and FLEX decoder was configured to report missed
frame information via the MFC bit in the roaming control packet. This bit is cleared when read.
MBI: Missed Block Information word 1. Set when at least one of the block information word ones
is received with an uncorrectable number of errors and FLEX decoder was configured to report
missed frame information via the MFC bit in the roaming control packet. This bit is set no more
than once per frame regardless of the number of missed block information word 1’s in the frame.
This bit is cleared when read.
MAW: Missed Address Word. Set when any address words in the address field is received with
an uncorrectable number of errors and FLEX decoder was configured to report missed frame
information via the MFC bit in the roaming control packet. This bit is set no more than once per
frame regardless of the number of missed address words in the frame. This bit is cleared when
read.
NBU: Network Bit Update. Set when the NBC bit in the roaming control packet is set and a frame
information word is received with a correctable number of errors. This bit will not be set when the
frame information word is not received due to missing the first synchronization pattern (A / A).
This bit is cleared when read.
Bit 7
0
RSR
x
x
Bit 6
1
MS1
x
x
Bit 5
1
MFI
x
x
Bit 4
0
MS2
x
x
Bit 3
0
MBI
x
SCU
Bit 2
0
MAW
x
RSC
2
Bit 1
0
NBU
NDR
RSC
1
1
Bit 0
0
n
NDR
RSC
0
0
367
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