MCF5272VF66R2J Freescale Semiconductor, MCF5272VF66R2J Datasheet - Page 437
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MCF5272VF66R2J
Manufacturer Part Number
MCF5272VF66R2J
Description
IC MCU 166MHZ 196MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Specifications of MCF5272VF66R2J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, WDT
Number Of I /o
32
Program Memory Size
16KB (4K x 32)
Program Memory Type
ROM
Ram Size
1K x 32
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
196-MAPBGA
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5272VF66R2J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Signal Descriptions
can be enabled, the INT1 interrupt can be disabled, and USB power-down modes can be enabled along
with its interrupt. Then when the ISDN transceiver is activated, its interrupt request can generate the USB
wake on ring signal, which causes the host controller on the PC to initiate USB traffic to the device. This
in turn causes the USB module to wake up the CPU. Note that USB_WOR, when configured by setting
USBEPCTL0[WOR_EN], is level-sensitive.
19.12 Timer Module Signals
This section describes timer module signals.
19.12.1 Timer Input 0 (TIN0)
The timer input (TIN0) can be programmed to cause events to occur in timer counter 1. It can either clock
the event counter or provide a trigger to the timer value capture logic.
19.12.2 Timer Output (TOUT0)/PB7
Timer mode: Timer output (TOUT0) is the output from timer 0.
Port B mode: This pin can also be configured as I/O pin PB7.
19.12.3 Timer Input 1 (TIN1)/PWM Mode Output 2 (PWM_OUT2)
Timer mode: Timer input 1 (TIN1) can be programmed as an input that causes events to occur in timer
counter 2. This can either clock the event counter or provide a trigger to the timer value capture logic.
PWM mode: Pulse-width modulator 2 (PWM_OUT2) compare output.
19.12.4 Timer Output 1 (TOUT1)/PWM Mode Output 1 (PWM_OUT1)
Timer mode: Timer output (TOUT1) is the output from timer 1.
PWM mode: Pulse-width modulator 1 (PWM_OUT1) compare output.
19.13 Ethernet Module Signals
The following signals are used by the Ethernet module for data and clock signals.
These signals are multiplexed with the parallel port B PB15–PB8 signals.
19.13.1 Transmit Clock (E_TxCLK)
This is an input clock which provides a timing reference for E_TxEN, E_TxD[3:0] and E_TxER.
®
MCF5272 ColdFire
Integrated Microprocessor User’s Manual, Rev. 3
Freescale Semiconductor
19-27
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