MC68HC711E9CFNE2 Freescale Semiconductor, MC68HC711E9CFNE2 Datasheet - Page 77

• Manufacturer Part Number: MC68HC711E9CFNE2
• Description: IC MCU 8BIT 512RAM 52-PLC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711E9CFNE2

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 38
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: OTP
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Processor Series: HC711E
• Core: HC11
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 2 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

M68HC11E Family — Rev. 3.2
MOTOROLA
1. SCP2 adds 39 to SCI prescaler and is present only in MC68HC(7)11E20.
$102A
$102B
$102C
$102D
$102E
$1027
$1028
$1029
Addr.
Serial Communications Status
Control Register 1 (SCCR1)
Control Register 2 (SCCR2)
Serial Peripheral Data I/O
Pulse Accumulator Count
Serial Peripheral Control
Serial Peripheral Status
Serial Communications
Serial Communications
Figure 4-7. Register and Control Bit Assignments (Sheet 6 of 8)
Baud Rate Register
Register (PACNT)
Register (SPCR)
Register (SPDR)
Register (SCSR)
Register (SPSR)
Register Name
See page 206.
See page 173.
See page 175.
See page 176.
See page 157.
See page 153.
See page 154.
See page 155.
(BAUD)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Operating Modes and On-Chip Memory
I = Indeterminate after reset
TDRE
TCLR
SPIE
Bit 7
SPIF
Bit 7
Bit 7
TIE
R8
0
0
0
0
1
I
= Unimplemented
SCP2
WCOL
TCIE
Bit 6
SPE
Bit 6
TC
T8
6
0
0
0
0
1
I
(1)
DWOM
RDRF
SCP1
Bit 5
Bit 5
RIE
5
0
0
0
0
0
0
Indeterminate after reset
Indeterminate after reset
MODF
MSTR
SCP0
IDLE
Bit 4
Bit 4
ILIE
M
R
4
0
0
0
0
0
0
Operating Modes and On-Chip Memory
= Reserved
WAKE
RCKB
CPOL
Bit 3
Bit 3
OR
TE
3
0
0
0
0
0
0
CPHA
SCR2
U = Unaffected
Bit 2
Bit 2
RE
NF
U
2
1
0
0
0
0
SPR1
SCR1
RWU
Bit 1
Bit 1
Technical Data
FE
U
U
1
0
0
0
0
Memory Map
SCR0
SPR0
Bit 0
Bit 0
Bit 0
SBK
U
U
0
0
0
0
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