DF2148BFA20 Renesas Electronics America, DF2148BFA20 Datasheet - Page 333

IC H8S MCU FLASH 128K 100-QFP

DF2148BFA20

Manufacturer Part Number
DF2148BFA20
Description
IC H8S MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148BFA20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2148BFA20
HD64F2148BFA20

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4.1
The CPU is driven by a system clock, denoted by the symbol . The period from one rising edge
of to the next is referred to as a “state.” The memory cycle or bus cycle consists of one, two, or
three states. Different methods are used to access on-chip memory, on-chip supporting modules,
and the external address space. Refer to the relevant microcontroller hardware manual for details.
4.2
On-chip memory is accessed in one state. The data bus is 16 bits wide, permitting both byte and
word access. Figure 4.1 shows the on-chip memory access cycle. Figure 4.2 shows the pin states.
On-Chip Memory (ROM, RAM)
Overview
Internal address bus
Read
access
Write
access
Internal read signal
Internal data bus
Internal write signal
Internal data bus
Figure 4.1 On-Chip Memory Access Cycle
Section 4 Basic Timing
Bus cycle
Rev. 4.00 Feb 24, 2006 page 317 of 322
Address
T1
Read data
Write data
Section 4 Basic Timing
REJ09B0139-0400

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