DF2148BFA20 Renesas Electronics America, DF2148BFA20 Datasheet - Page 197

• Manufacturer Part Number: DF2148BFA20
• Description: IC H8S MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148BFA20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SCI, X-Bus
• Peripherals: PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2148BFA20; HD64F2148BFA20

2.2.52 (5)
ROTR (ROTate Right)
Operation
ERd (right rotation)
Assembly-Language Format
ROTR.L ERd
Operand Size
Longword
Description
This instruction rotates the bits in a 32-bit register ERd (destination operand) one bit to the right.
The least significant bit (bit 0) is rotated to the most significant bit (bit 31), and also copied to the
carry flag.
Available Registers
ERd: ER0 to ER7
Operand Format and Number of States Required for Execution
Notes
Register direct
Addressing
Mode
ROTR (L)
Mnemonic
ROTR.L
ERd
MSB
b31
Operands
ERd
. . . . . .
1st byte
1
3
Condition Code
H: Previous value remains unchanged.
N: Set to 1 if the result is negative; otherwise
Z: Set to 1 if the result is zero; otherwise
V: Always cleared to 0.
C: Receives the previous value in bit 0.
2nd byte
B
Instruction Format
cleared to 0.
cleared to 0.
Rev. 4.00 Feb 24, 2006 page 181 of 322
—
I
0 erd
UI H
—
LSB
Section 2 Instruction Descriptions
b0
—
3rd byte
—
U
C
N
4th byte
REJ09B0139-0400
Z
V
0
States
No. of
C
Rotate
1