M30620FCPFP#U5C Renesas Electronics America, M30620FCPFP#U5C Datasheet - Page 140
![IC M16C MCU FLASH 128K 100QFP](/photos/12/41/124176/m30620fcpfp_u5c_sml.jpg)
M30620FCPFP#U5C
Manufacturer Part Number
M30620FCPFP#U5C
Description
IC M16C MCU FLASH 128K 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheets
1.QSK-62P_PLUS.pdf
(103 pages)
2.M30622SAFPU5.pdf
(308 pages)
3.M30620SPGPU3C.pdf
(423 pages)
Specifications of M30620FCPFP#U5C
Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
Package
100PQFP
Family Name
M16C
Maximum Speed
24 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
87
Interface Type
UART
On-chip Adc
26-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
11
For Use With
867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30620FCPFP#U5CM30620FCPFP#D3C
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
Figure 12.13
Address Match Interrupt Register i (i = 0 to 3)
Address Match Interrupt Enable Register 2
Address Match Interrupt Enable Register
(b23)
b7 b6 b5 b4
b7 b6 b5 b4
b7
Jan 10, 2006
(b19)
b3 b2 b1 b0
b3
b3 b2 b1 b0
AIER, AIER2 and RMAD0 to RMAD3 Registers
(b16)
b0
(b15)
b7
Address setting register for address match interrupt
Nothing is assigned. When w rite, set to “0”.
When read, their contents are indeterminate.
Bit Symbol
Bit Symbol
AIER20
AIER21
(b7-b2)
(b7-b2)
Symbol
Symbol
AIER0
AIER1
AIER2
AIER
—
—
Page 123 of 390
Address Match Interrupt 2
Enable Bit
Address Match Interrupt 3
Enable Bit
Nothing is assigned. When w rite, set to “0”.
When read, their contents are indeterminate.
Address Match Interrupt 0
Enable Bit
Address Match Interrupt 1
Enable Bit
Nothing is assigned. When w rite, set to “0”.
When read, their contents are indeterminate.
(b8)
b0
b7
Address
Bit Name
Address
Bit Name
01BBh
0009h
Function
b0
RMAD0
RMAD1
RMAD2
RMAD3
Symbol
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
01BAh to 01B8h
01BEh to 01BCh
0012h to 0010h
0016h to 0014h
Address
XXXXXX00b
XXXXXX00b
After Reset
After Reset
Function
Function
00000h to FFFFFh
Setting Range
After Reset
X00000h
X00000h
X00000h
X00000h
12. Interrupt
RW
RW
RW
RW
RW
RW
RW
RW
—
—
—
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