MC9S12XDT256MAA Freescale Semiconductor, MC9S12XDT256MAA Datasheet - Page 832

• Manufacturer Part Number: MC9S12XDT256MAA
• Description: IC MCU 256K FLASH 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XDT256MAA

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 59
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-QFP
• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 16KB
• # I/os (max): 59
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Processor Series: S12XD
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 59
• Number Of Timers: 12
• Operating Supply Voltage: 0 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12XDP512E
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
22.3.2.11 S12X_EBI Ports, BKGD, VREGEN Pin Pull-up Control Register (PUCR)
Read: Anytime in single-chip modes.
Write: Anytime, except BKPUE which is writable in special test mode only.
This register is used to enable pull-up devices for the associated ports A, B, C, D, E, and K. Pull-up devices
are assigned on a per-port basis and apply to any pin in the corresponding port that is currently configured
as an input.
834
PUPKE
BKPUE
PUPEE
PUPDE
PUPCE
PUPBE
PUPAE
Reset
Field
7
6
4
3
2
1
0
W
R
PUPKE
Figure 22-13. S12X_EBI Ports, BKGD, VREGEN Pin Pull-up Control Register (PUCR)
Pull-up Port K Enable
0 Port K pull-up devices are disabled.
1 Enable pull-up devices for Port K input pins.
BKGD and VREGEN Pin Pull-up Enable
0 BKGD and V
1 Enable pull-up devices on BKGD and V
Pull-up Port E Enable
0 Port E pull-up devices on bit 7, 4–0 are disabled.
1 Enable pull-up devices for Port E input pins bits 7, 4–0.
Note: Bits 5 and 6 of Port E have pull-down devices which are only enabled during reset. This bit has no effect
Pull-up Port D Enable
0 Port D pull-up devices are disabled.
1 Enable pull-up devices for all Port D input pins.
Pull-up Port C Enable
0 Port C pull-up devices are disabled.
1 Enable pull-up devices for all Port C input pins.
Pull-up Port B Enable
0 Port B pull-up devices are disabled.
1 Enable pull-up devices for all Port B input pins.
Pull-up Port A Enable
0 Port A pull-up devices are disabled.
1 Enable pull-up devices for all Port A input pins.
1
7
on these pins.
= Unimplemented or Reserved
BKPUE
REGEN
1
6
pull-up devices are disabled.
Table 22-14. PUCR Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
0
0
5
PUPEE
REGEN
1
4
Description
pins.
PUPDE
0
3
PUPCE
0
2
PUPBE
Freescale Semiconductor
0
1
PUPAE
0
0